IPC@CHIP SC2x3
Hardware Manual V1.02 [01.03.09]
©2000-2009 BECK IPC GmbH
Page 34
7
System interrupts
Source
Sensitivity
0
IRQ0
level high/level low/rising edge/falling edge
1
IRQ1
level high/level low/rising edge/falling edge
2
IRQ2
level high/level low/rising edge/falling edge
3
IRQ3
level high/level low/rising edge/falling edge
4-5
reserved
-
6
SliceTimer0
-
7-10
reserved
-
11
Timer1
-
12
Timer2
-
13
Timer3
-
14
Timer4
-
15
Timer5
-
16
Timer6
-
17
Timer7
-
18-19 reserved
-
20
PSC1_4/PIO4
any transition/pulse/rising edge/falling edge
21
PSC2_4/PIO9
any transition/pulse/rising edge/falling edge
22
PSC3_4/PIO14
any transition/pulse/rising edge/falling edge
23
PSC3_5/PIO15
any transition/pulse/rising edge/falling edge
24
PSC3_8/PIO18
any transition/pulse/rising edge/falling edge
25
PSC3_9/PIO19
any transition/pulse/rising edge/falling edge
26
PSC6_0/PIO20
any transition/pulse/rising edge/falling edge
27
PSC6_1/PIO21
any transition/pulse/rising edge/falling edge
28
USB1_9/PIO28
any transition/pulse/rising edge/falling edge
29
GPIO_7/PIO31
any transition/pulse/rising edge/falling edge
30-31 reserved
-
32
SPI controller (slave mode)
-
33
I2C1 controller (slave mode)
-
34
I2C2 controller (slave mode)
-
7.1 Watchdog
The SC2x3 provides a true watchdog timer function. The watchdog can be used to regain control of the system
when software fails to respond as expected. The watchdog is active after reset. The watchdog timeout period is
about 800 ms. The mode can be set to trigger the watchdog by the user program or by the CHIP-RTOS
(default). In CHIP-RTOS mode, the CHIP-RTOS performs the watchdog strobing provided that the system's
timer interrupt is allowed to execute. Beware that excessive interrupt masking periods can lead to system
resets.
