CAPA110/111 AMD Embedded G-Series Processor Capa Board with LVDS
Digital I/O
1.
When DIO0~2 are connected to external device, the device sets DIO0~2 to high
DIO7 DIO6 DIO5 DIO4 DIO3 DIO2 DIO1 DIO0
Output Output Output Output Output
1
1 1
2.
When DIO0~2 are connected to external device, the device sets DIO0 to low and DIO1~2 to high
DIO7 DIO6 DIO5 DIO4 DIO3 DIO2 DIO1 DIO0
Output Output Output Output Output
1
1
0
Note3:
If N=07h
DIO7 DIO6 DIO5 DIO4 DIO3 DIO2 DIO1 DIO0
Output Output Output Output Output Input
Input Input
1. When
M=FFh
DIO7 DIO6 DIO5 DIO4 DIO3 DIO2 DIO1 DIO0
1 1 1 1 1 1 1 1
2. When
M=D7h
DIO7 DIO6 DIO5 DIO4 DIO3 DIO2 DIO1 DIO0
1 1 0 1 0 1 1 1
Single Board Computer
distronik GmbH
https://www.distronik.de
Software stability is major issue in most application. Some embedded systems are not
watched by human for 24 hours. It is usually too slow to wait for someone to reboot when
computer hangs. The systems need to be able to reset automatically when things go wrong.
The watchdog timer gives us solution.
The watchdog timer is a counter that triggers a system reset when it counts down to zero from
a preset value. The software starts counter with an initial value and must reset it periodically. If
the counter ever reaches zero which means the software has crashed, the system will reboot.
The I/O port base addresses of watchdog timer are 2E (hex) and 2F (hex). The 2E (hex) and
2F (hex) are address and data port respectively.
Assume that program A is put in a loop that must execute at least once every 10ms. Initialize
watchdog timer with a value bigger than 10ms. If the software has no problems; watchdog
timer will never expire because software will always restart the counter before it reaches zero.
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Summary of Contents for CAPA110
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