AW86225
October 2021 V1.9
www.awinic.com
28 Copyright © 2020 SHANGHAI AWINIC TECHNOLOGY CO., LTD
WAVCFG12: (Address 15h)
Bit
Symbol
R/W
Description
Default
7:4
SEQ7LOOP
RW
control the loop number of the seventh sequence
b0000~b1110: play code+1 time
b1111: playback infinitely until STOP set to 1 or SEQ7LOOP
≠
0xF
0
3:0
SEQ8LOOP
RW
control the loop number of the eighth sequence
b0000~b1110: play code+1 time
b1111: playback infinitely until STOP set to 1 or SEQ8LOOP
≠
0xF
0
WAVCFG13: (Address 16h)
Bit
Symbol
R/W
Description
Default
7
Reserved
RW
Not used
0
6:5
WAITSLOT
RW
Unit of wait time
b00: (1/WAVDAT_MODE)s
b01: (8/WAVDAT_MODE)s
b10: (64/WAVDAT_MODE)s
b11: (512/WAVDAT_MODE)s
0
4
Reserved
RW
Not used
0
3:0
MAINLOOP
RW
control the main loop number
b0000~b1110: play code+1 time
b1111: playback infinitely until STOP set to 1 or MAINLOOP
≠
0xF
0
CONTCFG1: (Address 18h)
Bit
Symbol
R/W
Description
Default
7:4
EDGE_FRE
RW
Define the edge frequency
b1000: 200Hz
b1001: 210Hz
b1010: 260Hz
b1011: 280Hz
b1100: 300Hz
b1101: 600Hz
b1110: 700Hz
b1111: 800Hz
b0000-b0111: play non-filtered square wave in CONT mode
14
3
EN_F0_DET
RW
F0 detection mode enable
0: disable
1: enable
0
2:1
Reserved
RW
Not used
0
0
SIN_MODE
RW
Edge mode for filtered square wave of CONT mode:
0: sine
1: cos
1
CONTCFG2: (Address 19h)
Bit
Symbol
R/W
Description
Default
7:0
F_PRE
RW
Set the value of F0, F0=(24K/code)Hz
0x8D
CONTCFG3: (Address 1Ah)
Bit
Symbol
R/W
Description
Default
7:0
DRV_WIDTH
RW
half cycle drive time(code/48K s) of brake, this value must be smaller than half
cycle time of F0.
DRV_WIDTH is recommended to be configured as
(
24k/F0
)
-8-TRACK_MARGIN-
BRK_GAIN
0x6A
CONTCFG5: (Address 1Ch)
Bit
Symbol
R/W
Description
Default
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