Avtron ADDvantage-32, Manual, Page: 183 / 290

Control Block Description
ADDvantage-32
4-121
If SPDVOL = low, OUT = CEMF × GAIN.
If SPDVOL = high and 1 OR 2 = high, and no tach loss is detected,
OUT = TACH1 × GAIN.
If SPDVOL = high and 1 OR 2 = low, and no tach loss is detected,
OUT = TACH2 × GAIN.
Tach failure conditions are detected by comparing CEMF to TACH inputs as follows:
If CEMF × GAIN > 0.20 × MXSPD and
TACH × GAIN < 0.05 × MXSPD,
or If CEMF × GAIN >0.20 and the polarity of CEMF
<> the polarity of TACH,
then tach failure will be detected regardless of whether the associated tach input is
selected or not. Therefore, if CEMF feedback is used as the speed feedback, TACH
LOSS should not be configured to a USR FAULT. Any time a tach failure is detected,
the associated WARN bit will turn on. (That is, if a TACH1 failure is detected, the
1WARN bit turns on; if a TACH2 failure is detected, the 2WARN bit is turned on.)
If tach feedback is used (SPDVOL = high), and if a tach failure is detected, then the
TACH SELECT block can be configured to automatically switch to the redundant tach or
to control in CEMF. The logic is described in Figure 4-68 and as follows:
If SPDVOL = high and RED = high, then if a tach failure is detected, the output will
switch from the failed tach to the redundant tach. For example, if 1 OR 2 = high, and the
TACH1 input fails, OUT will switch from TACH1 × GAIN to TACH2 × GAIN.
If SPDVOL = high and V RED = high, then if a tach failure is detected, the output will
switch from the failed tach feedback to CEMF feedback. For example, if 1 OR 2 = high,
and the TACH1 input fails, OUT will switch from TACH1 × GAIN to CEMF × GAIN.
If SPDVOL = high and both RED and V RED = high, then if a tach failure occurs, the
TACH SELECT block will switch first to the redundant tach; if the redundant tach fails,
the output will switch to CEMF feedback.