Avtron ADDvantage-32, Manual

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Control Block Description
ADDvantage-32
4-83
2. Outputs
OUT: Analog
RMP: Bit
3. Implementation
If ZERO bit is low, OUT = 0. When ZERO bit goes high, OUT ramps to REF by the
UP or DWN ramp rates. (Highest bit priority.)
If the RES bit is high, OUT = REF. (Second in priority.)
If the HLD bit is low, OUT is held at its present value. The rounding continues to
prevent a step response. When
HLD goes high, OUT ramps to REF by the appropriate
rate.
The UP/DWN inputs are entered in units/second.
The following holds true while the HLD , ZERO bits are set high and the RES bit is low:
If REF is increasing faster than UP, the RMP bit is set high and OUT ramps at the UP
value. If UP is equal to zero, then the OUT ramps with the REF. If REF decreases faster
than DWN, the RAMP bit is set high and OUT ramps at the DWN value. If DWN is
equal to zero, then the OUT ramps with the REF. If neither of the preceding conditions
are true, the RMP bit is set low and OUT equals REF.
The RND input determines the amount of S-ramp to be applied to the OUT. This is
implemented as a low pass filter to the linear ramp. The RND value is entered as a time
constant in seconds. If RND < .005, no rounding will take place.
NOTE
On powerup, OUT = REF.