Control Block Description
ADDvantage-32
4-110
2. Outputs
OUT:
Analog
DIF:
Analog
MAX:
Bit
MIN:
Bit
3. Implementation
When the INC bit is high, the OUT value starts to ramp up at INCR rate. INCR is a rate
entered in process units per second. The ramp continues until the INCR bit goes low or
the OUT value reaches a limit. Upon reaching the limit, the MAX bit goes high and stays
high until the OUT value goes below the limit. The limit is defined as follows.
If the ABS bit is low, the OUT value clamps at MAXL × REF.
If the ABS bit is high, the OUT value clamps at MAXL + REF.
The DEC, DECR and MIN operate in the same manner as the INC functions.
If the UP input is high and REF changes, OUT will reset to equal REF and the INC/DEC
changes will be negated.
If the UP input is low and REF changes, OUT changes depending on the ABS input. If
the ABS bit is low, the OUT value changes by the REF value multiplied by the ratio of
the INC/DEC change.
Example: ABS BIT = LOW
REF equals 100 and the INC bit is set high until OUT is increased to 150. Then if
REF is changed to 200, OUT will equal 300.
300
200
100
)
150
(
=
×
If the ABS bit is high, the OUT value changes by the REF plus the INC/DEC
change.
Example: ABS BIT = HIGH
REF equals 100 and the INC bit is set high until OUT is increased to 150. Then if
REF is changed to 200, OUT will equal 250.
(150-100)
+
200
=
250
Summary of Contents for ADDvantage-32
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Page 159: ...Control Block Description ADDvantage 32 4 97 FIGURE 4 61D ...
Page 160: ...Control Block Description ADDvantage 32 4 98 FIGURE 4 61E ...
Page 175: ...Control Block Description ADDvantage 32 4 113 FIGURE 4 67 SNAPAVG BLOCK ...
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