AVT MAGIC ISDN, Hardware Description

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PA G E 2 8
S Y S T E M D E S C R I P T I O N
2.6 The ‘Layer II/III Audio Decoder’
For the Decoder, it is similarly valid as shown in SECTION 2.5, except for the
restriction that the Audio signal can only be decoded. FIGURE 2.8 shows the
block diagram of the Decoder. The functionality corresponds with the Codec
unit, except that it is not equipped with the Encoder.
FIGURE 2.8 BLOCK DAIGRAM OF THE LAYER II/III AUDIO DECODER
Decoder
Layer II/III
V.11
TTL
V.11
TTL
V.24
TTL
V.11
TTL
UART
PCB-Address
VCO
Clock Mux
Host
Control
AES/
EBU
Select Sampl. Clk
Dig. Aud. Data
Deemph.
Mux
Level
Sampl. Clk (asyn.)
RXD_V
X21_Clk
Clk_Syn
RXD
TXD
XD
XC
Sampl. Clk (syn.)
Transmit Clk
Audio Out
Data to D/A-Converter
Hostbus
Hostbus
Add. Data
Ext. Bus
Ext. Bus
Ext. Bus
Encoded Audio Data