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22 Sept 2016
v1.1
2.8
PS/PL PMOD™ Interfaces – JA, JB, JZ & JPS1
The carrier has four Digilent Pmod™ right angle 0.1” female sockets (2x6). Three connectors
are for the SoC’s PL (JA, JB, JZ) and one for the SoC’s PS (JPS1). These connections include
eight GPIO. The JA, JB, and JZ PL Pmods are powered via VCCO_13 (3.3V).
•
Pmod™ Connections based on board type:
o
PicoZed 7010: JPS1 Pmod only
o
PicoZed 7020: JPS1, JA, JB Pmods
o
PicoZed 7015/30: JPS1, JA, JB, JZ Pmods
•
JPS1 - PS Pmod is attached to bank 500 and can be used as a general Pmod
interface, Processor (PJTAG) access or other hardened MIO peripherals (SPI, GPIO,
CAN, I2C, UART, SD, QSPI, Trace, Watchdog). Note that these Pmod signals are
muxed to eMMC on the PicoZed SOM.
•
NOTE:
The PS_PMOD interface on the PicoZed SOM is, by default, disabled as the
mux on the SOM is, by default, set to eMMC mode. To select between the PS_PMOD
interface and the eMMC interface, please see the SOM’s User Guide:
http://picozed.org/support/documentation/4736
JA Pmod
™
SOM Net Name:
Carrier
Net Name:
JX1
Connection:
JA PMOD Pin
Number:
JA
BANK13_LVDS_0_P
JA0-1_P
87
1
BANK13_LVDS_0_N
JA0-1_N
89
2
BANK13_LVDS_1_P
JA2-3_P
88
3
BANK13_LVDS_1_N
JA2-3_N
90
4
BANK13_LVDS_2_P
JA4-5_P
91
7
BANK13_LVDS_2_N
JA4-5_N
93
8
BANK13_LVDS_3_P
JA6-7_P
92
9
BANK13_LVDS_3_N
JA6-7_N
94
10
JB Pmod
™
SOM Net Name:
Carrier
Net Name:
JX3
Connection:
JB PMOD Pin
Number:
JB
BANK13_LVDS_8_P
JB0-1_P
74
1
BANK13_LVDS_8_N
JB0-1_N
76
2
BANK13_LVDS_9_P
JB2-3_P
79
3
BANK13_LVDS_9_N
JB2-3_N
81
4
BANK13_LVDS_10_P
JB4-5_P
80
7
BANK13_LVDS_10_N
JB4-5_N
82
8
BANK13_LVDS_11_P
JB6-7_P
85
9
BANK13_LVDS_11_N
JB6-7_N
87
10
JZ Pmod
™
SOM Net Name:
Carrier
Net Name:
JX3
Connection:
JZ PMOD Pin
Number:
JZ
BANK13_LVDS_14_P
JZ0-1_P
92
1
BANK13_LVDS_14_N
JZ0-1_N
94
2
BANK13_LVDS_13_P
JZ2-3_P
91
3
BANK13_LVDS_13_N
JZ2-3_N
93
4
BANK13_LVDS_16_P
JZ4-5_P
98
7
BANK13_LVDS_16_N
JZ4-5_N
100
8
BANK13_LVDS_15_P
JZ6-7_P
97
9
BANK13_LVDS_15_N
JZ6-7_N
99
10
Table 9 – PL PMOD Pin Assignments
