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Trace

7-4

ICE50 User Guide

2523A–AVR–11/02

7.3

Contents of
Trace Window
Based on
Instruction
(ICE50)

As can be seen from Enabling Trace, the contents of the different columns varies with
which instruction is being executed. This section describes how to interpret the contents
of the Trace buffer based on which instruction is being executed.

Some of the explanations are tagged with a number. This number indicates the cycle
number in the instruction execution (important for multi-cycle instructions only). The
term N/A is used when a field does not contain any valuable information.

Table 7-1. Arithmetic and Logic Instructions

Instruction
INSTA[0..15]

PMem Addr
[PC[A0..22]

Reg.Val
RegFileL[0..7]

Dat.Addr
RAM_EEADDR
[0..22]

Dat.Val

Status
Register

ADD Rd,Rr

Address of instruction

Result of addition

N/A

N/A

Z,C,N,V,S,H

ADC Rd, Rr

Address of instruction

Result of addition

N/A

N/A

Z,C,N,V,S,H

ADIW Rdl,K

1. Address of instruction

1. Result of addition, low byte

1. N/A

1. N/A

Z,C,N,V,S

2. Address of next instruction

2. Result of addition, high byte

2. N/A

2. N/A

SUB Rd, Rr

Address of instruction

Result of subtraction

N/A

N/A

Z,C,N,V,S,H

SUBI Rd, K

Address of instruction

Result of subtraction

N/A

N/A

Z,C,N,V,S,H

SBC Rd, Rr

Address of instruction

Result of subtraction

N/A

N/A

Z,C,N,V,S,H

SBCI Rd, K

Address of instruction

Result of subtraction

N/A

N/A

Z,C,N,V,S,H

SBIW Rdl,K

1. Address of instruction

1. Result of subtraction, low byte

1. N/A

1. N/A

Z,C,N,V,S,H

2. Address of next instruction

2. Result of subtraction, high byte

2. N/A

2. N/A

AND Rd, Rr

Address of instruction

Result of logical AND

N/A

N/A

Z,N,V,S

ANDI Rd, K

Address of instruction

Result of logical AND

N/A

N/A

Z,N,V,S

OR Rd,Rr

Address of instruction

Result of logical OR

N/A

N/A

Z,N,V,S

ORI Rd, K

Address of instruction

Result of logical OR

N/A

N/A

Z,N,V,S

EOR Rd, Rr

Address of instruction

Result of logical EOR

N/A

N/A

Z,N,V,S

COM Rd

Address of instruction

Result of complement

N/A

N/A

Z,C,N,V,S

NEG Rd

Address of instruction

Result of negation

N/A

N/A

Z,C,N,V,S,H

SBR Rd,K

Will never appear (is
disassembled to ORI
instruction)

N/A

N/A

N/A

Z,N,V,S

CBR Rd,K

Will never appear (is
disassembled to ANDI
instruction)

N/A

N/A

N/A

Z,N,V,S

INC Rd

Address of instruction

Result of incrementation

N/A

N/A

Z,N,V,S

DEC Rd

Address of instruction

Result of decrementation

N/A

N/A

Z,N,V,S

TST Rd

Will never appear (is
disassembled to AND
instruction)

N/A

N/A

N/A

Z,N,V,S

CLR Rd

Address of instruction

Result (always 0x00)

N/A

N/A

Z,N,V,S

SER Rd

Will never appear (is
disassembled to LDI
instruction)

N/A

N/A

N/A

N/A

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Summary of Contents for ICE50

Page 1: ...ICE50 User Guide ...

Page 2: ......

Page 3: ...er Break in Sleep Mode 1 2 1 3 2 ADC Latch up 1 2 1 3 3 User Break 1 2 1 4 Reporting Problems 1 3 Section 2 Introduction 2 1 2 1 ICE50 Contents 2 1 2 2 ICE50 Features 2 2 2 3 System Requirements 2 3 2 3 1 Hardware Requirements 2 3 2 3 2 Software Requirements 2 3 2 3 3 Target Hardware Requirements 2 3 2 3 4 Operating Conditions 2 3 2 3 5 Host Interface 2 3 Section 3 General Description 3 1 3 1 Gene...

Page 4: ...162 Personality Adapter 3 9 3 4 7 m128 Personality Adapter 3 10 3 4 8 m169 Personality Adapter 3 10 3 5 POD Description 3 11 3 5 1 POD Description 3 11 3 5 2 Digital I O 3 12 3 5 3 Analog Comparator 3 14 3 5 4 A D Converter 3 14 3 6 Power System Description 3 15 3 6 1 Power Supply 3 15 3 6 2 ICE50 Power System 3 15 3 6 3 Target Application Power Requirements 3 16 3 7 Probe Description 3 17 3 7 1 P...

Page 5: ... 5 6 ICE Status 5 9 5 7 Boot Block Options 5 11 5 8 Special 5 12 5 9 Downloading New Parts for ICE50 5 12 5 10 Upgrading the ICE50 Firmware 5 13 Section 6 Special Considerations 6 1 6 1 Electrical Compatibility 6 1 6 1 1 Power 6 1 6 1 2 I O Lines 6 1 6 2 Sleep Mode 6 2 6 3 Target Hardware Requirements 6 2 6 4 Clock Options 6 2 6 5 Differences Between Emulator and Part 6 2 Section 7 Trace 7 1 7 1 E...

Page 6: ...Table of Contents iv ICE50 User Guide 2523A AVR 11 02 Section 8 Troubleshooting 8 1 8 1 Troubleshooting Guide 8 1 ...

Page 7: ... Some sections contain useful tips for using the ICE50 All the tips are emphasized as shown in the example below Tip This is a tip 1 1 3 Workaround Workaround This is a workaround 1 1 4 Checklists Once comfortable with the configurtion and use of the ICE50 the checklists at the end of these sections can be used for fast setup of a new project The checklists are of great help for getting the debugg...

Page 8: ... releases of the ICE50 firmware 1 2 1 Version 1 0 First released version 1 2 2 Version 1 1 Errors in trace module fixed Version table readout in main module fixed 1 2 3 Version 1 2 All parts with ADC ADC bit 3 and 4 where interchanged This is now fixed on all parts with ADC Trace of Program Counter is now correct in single step Brown out Detection BOD Selection of Brown out Voltage is now enabled ...

Page 9: ...Preface ICE50 User Guide 1 3 2523A AVR 11 02 1 4 Reporting Problems Problems with AVR Studio can be reported to avr atmel com Problems with beta releases can be reported to avrbeta atmel com ...

Page 10: ...Preface 1 4 ICE50 User Guide 2523A AVR 11 02 ...

Page 11: ...ange of the eight bits AVR microcontrollers from Atmel This section gives a brief introduction to it s features 2 1 ICE50 Contents Figure 2 1 The ATICE50 contains the following items ICE50 Main Unit Pod Two FPC Flexible Printed Circuit Cables Probe Personality Adapters for ATmega8 ATmega16 ATmega162 ATmega32 ATmega128 ATtiny26 ...

Page 12: ...he ICE50 is controlled by AVR Studio 4 0 or later Present the following devices are supported ATtiny26 ATmega8 ATmega16 ATmega162 ATmega32 ATmega128 ATmega169 ATmega8515 ATmega8535 The ICE50 supports the following features Emulates All Digital and Analog Peripherals Target Voltage Range 2 2V 5 5V Full Target Frequency Range for All Supported Devices Watches Trace Buffer Unlimited Number of Break P...

Page 13: ...3 51 1 Windows NT Version 4 0 1 Windows 95 Windows 98 ME Windows 2000 Windows XP AVR Studio is always updated to fit new operating systems and versions See AVR Studio User s Guide for latest information Note 1 Windows NT 3 51 and Windows NT 4 0 does not support USB communication 2 3 3 Target Hardware Requirements The target must be able to supply 2 2 5 5V 150mA See Table 3 6 for further informatio...

Page 14: ...Introduction 2 4 ICE50 User Guide 2523A AVR 11 02 ...

Page 15: ... What is an In Circuit Emulator The ICE50 is an In Circuit Emulator An emulator is a dedicated piece of hardware designed to emulate the behaviour of another piece of hardware In the case of the ICE50 it is designed to behave as a wide range of AVR devices Exact emulation is the goal for all emulators and the ICE50 offers the highest possible level of compatibility The ICE50 emulator system consis...

Page 16: ... 3 2 2 Status LEDs There are three LEDs on the front of the ICE50 cabinet One red one red green duo LED and one green LED All these LEDs give important status information on the ICE50 and which mode it is operating in The picture below shows a close up of the LEDs When turning on power on the ICE50 the normal LED sequence will be as follows 1 Red Power LED turns ON 2 Mode LED turns ON and is first...

Page 17: ...es that the ICE is in run mode If the LED turns red it indicates an emulator error If this happens consult the troubleshooting guide 3 2 2 3 Green Status LED The green LED will be turned on when the ICE50 is ready for emulation Once the green LED is on the ICE50 is ready for emulation The LED will flash during upgrading of the ICE50 The LED will be turned off during loading of a new part and lit w...

Page 18: ...out the POD connected the ICE50 will still be able to emulate core functions of the AVR e g timers This feature can be useful in some debugging sessions If the POD is inserted and there is no target power applied the ICE will be held in Reset until target power is turned on By disabling POR and BOD Reset in ICE50 other options dialog ICE50 will emulate correctly even if target power is not connect...

Page 19: ... communication between the ICE50 and AVR Studio is done through a stan dard RS 232C interface This is the communication protocol used by COM ports on PCs The communication runs at 115200 bit s no parity 8 data bits 1 stop bit N81 For information on how to connect the ICE50 to a PC see the Connecting ICE50 to PC section See Figure 3 6 3 3 6 Reset Button By pressing the reset button on the ICE50 a W...

Page 20: ...ange of personality adapters These adapters map the pinout from the ICE50 POD to each of the microcontrollers it supports Each adapter includes an identification code that the ICE50 and AVR Studio use for automatic device detec tion The ICE50 package contains the following Personality Adapters Each adapter corresponds to one pinout type and supports one or more AVR microcon trollers Table 3 2 show...

Page 21: ... the circle on the Personality Adapter as shown in Figure 3 8 Figure 3 8 Connecting Personality Adapter to Probe 3 4 2 t26 Personality Adapter The t26 Personality adapter is a PDIP adapter for t26 devices The footprint is a stan dard 20 lead 0 300 wide PDIP package If the target uses another package type an additional adapter has to be purchased from a third party vendor When connecting the Person...

Page 22: ... sonality Adapter as shown above Figure 3 10 t28 and t29 Personality Adapter 1 Note 1 SNR A9902 3 1350 B 3 4 3 1 Supported Devices ATtiny28 3 4 4 m8 Personality Adapter The m8 Personality adapter is a PDIP adapter for m8 devices The footprint is a stan dard 28 lead 0 300 wide PDIP package If the target uses another package type an additional adapter has to be purchased from a third party vendor Wh...

Page 23: ...ty Adapter as shown above Figure 3 12 m32 Personality Adapter 1 Note 1 SNR A9902 3 1310 B 3 4 5 1 Supported Devices ATmega32 ATmega16 3 4 6 m162 Personality Adapter The m162 Personality adapter is a PDIP adapter for m162 devices The footprint is a standard 40 lead 0 600 wide PDIP package If the target uses another package type an additional adapter has to be purchased from a third party vendor Whe...

Page 24: ... here Once the bottom module is soldered into the application connect the top module Make sure that pin 1 on the top module matches the pin 1 on the bottom module Once the Personality Adapter is securely mounted place the Probe on the Personality adapter The circle marked on the Probe should align with pin 1 on the m128 adapter Figure 3 14 m128 Personality Adapter 1 Note 1 SNR W10635SDF 3 4 7 1 Su...

Page 25: ... The ICE50 POD is shown in Figure 3 16 It connects to the main unit through two dock ing connectors When connecting or disconnecting the POD do not use excessive force as this might damage the POD Figure 3 16 ICE50 POD The POD contains all analog and digital logic necessary to emulate the target AVR device The circuitry is designed to give as close as possible electrical characteristics as the rea...

Page 26: ...are larger for the ICE50 than for the actual emu lated part The diagram below shows the timing data for driving out and reading in a signal on the IO ports of the Emulator The data direction register is assumed set to 1 in Figure 3 18 Table 3 3 shows typical data Figure 3 18 Data Direction Register PULLUP DDRxy PORTxy DDRxy PORTxy PINxy PINKEEPx VCC 330K 36K Pxy VCC Emulator VCC Target LEVEL CONVE...

Page 27: ... DDR register to the output is driven high 4 tDHZ time from clearing the DDR register to the output is driven low The drive capability of the output buffers are 24 mA at 3V VCC This slightly exceeds the driving capability of the actual parts The operating voltage range of the IO circuits are 2 VCC to 5 5 VCC At 2V VCC the buffers are able to sink 25 mA with a maximal output low voltage VOLmax of 1...

Page 28: ...ax 750 ns The comparator features an internal hysteresis of typical 1 mV max 4 mV 25 C to ensure clean switching Figure 3 20 Analog Comparator Block Diagram 3 5 4 A D Converter The block diagram of the ICE50 AD converter is shown in Figure 3 21 Figure 3 21 ICE50 AD Converter ACME ADEN AIN1 ADC Multiplexer Output ACBG 1 2V AIN0 ACD 100R ACO ANALOG COMPARATOR 330Ω 330Ω 330Ω 330Ω 330Ω 330Ω 330Ω 330Ω ...

Page 29: ...nt The outputs of the input multiplexers are clamped to VCC and GND and thus when target VCC is present and the emulator power is turned off there will flow a current of approximately Vinput 0 3V 330Ω through each ADC input pin 3 6 Power System Description The ICE50 needs external power in order to function A switching power adapter is sup plied with the unit The power adapter will accept input vo...

Page 30: ...sioned to tolerate this current consumption Note The Digital I O drive capabilities of the ICE50 POD differ slightly from what can be expected in the actual device For details on the Digital I O drive capabilities compared to the actual device please see the Digital I O section of the POD description Table 3 5 Power Requirements Power Requirements Power Voltage Requirements 9 15 VDC Power Consumpt...

Page 31: ...e target and the POD The probe also implements proper line termination in order to avoid ringing on high freuency signals 3 7 1 Probe Description The Probe contains clock driver circuitry for the ICE50 voltage polarity and short circuit protection Figure 3 23 show a picture of the probe and a simplified block diagram of how the clock driver circuitry is implemented is shown in Figure 3 24 and Figu...

Page 32: ... XTAL1 pin on the emulator probe The Emulator can then be set up to use this signal as the system clock See device selection for a description of how to set up AVR Studio for this option The clock signal must meet the conditions as shown in Table 3 7 3 7 3 Internal Clock Signal Provided by AVR Studio The Emulator may be set up to run on an internal programmable clock The frequency range of this pr...

Page 33: ...l and External Resonator External crystal resonator is not supported on the ICE50 probe Instead configure the Emulator to use the internal programmable clock The XTAL1 pin will then be tri stated XTAL2 pin will be enabled and the internal programmable clock is driven out on the XTAL2 pin See special section for a description of how to set up the XTAL2 clock 3 7 7 External RC Oscillator External RC...

Page 34: ...appear Figure 3 27 Start Test Program in AVR Studio The tests that require a Test Adapter connected to the probe are the ones marked on the list above Select the test that should be run and press the Run button to start the test Finally the test program will show the status of the test Note AVR Studio 4 0 or later is required for ICE50 support AVR Studio 3 x versions will not work with ICE50 Tip A...

Page 35: ...shipped with the ICE50 Connect the male cable connector to the ICE50 and the female connector to the host PC The communica tion runs at 115200 bit s no parity 8 data bits 1 stop bit N81 and with hardware handshake AVR Studio can not force control over a COM port If other equipment or software driv ers have control of the COM port eg IrDA PDA Scanner communication with the ICE50 will fail Make sure...

Page 36: ...he personality adapter Use the circles on the Per sonality Adapters and the Probe to safely determine correct orientation Make sure that the probe is connected to the pod connector on the ICE50 Figure 4 1 Connecting PDIP Adapters Part One of Two Note 1 Place the Personality Adapter in the target application socket Make sure that the dot on the Personality Adapter match pin 1 in the target socket F...

Page 37: ...the Personality Adapter on the target applica tion Make sure that pin 1 on the adapter matches pin 1 in the target application 2 Place the TQFP top module on top of the soldered bottom module Again take care to place it with the correct orientation 3 Place the Probe on the Personality Adapter Use low temperature solder and soldering iron when soldering the bottom part to the tar get This will ensu...

Page 38: ...ct Power up sequence 4 4 ICE50 Power up Sequence When the ICE50 is properly connected to the target and the host PC the power can be turned on The following procedure is recommended to ensure proper communication between the ICE50 and AVR Studio Power up ICE50 wait for yellow LED to be lit Power up target board Start AVR Studio Note The equipment will not be harmed in any way if a different power ...

Page 39: ... emulator options menu The configuration is stored in a separate file and will automatically be loaded when starting the project later This section is divided in two subsections 1 One Quick Start Guide describing the procedure to get the AVR Studio configured 2 One subsection describing all emulator options in detail 5 1 ICE50 Emulator Options Device Selection Options Fuses ICE Module Revision lis...

Page 40: ...ew or opening an existing AVR Assembler project See picture below 3 If you have already made an object file you can open this directly See Figure 5 1 Figure 5 1 Welcome to AVR Studio 4 4 If a new project is chosen type in the project name Check create initialfile if you would like an assembler file with the same name as the project If you would like a folder created with the same name check this o...

Page 41: ...n menu Note the icon to the left for each part name Click this icon if this part is to be loaded into the ICE50 A total of four part files can be contained in the ICE50 at the same time Some part files contain two AVR emulator parts The status bar at the right side indicates how many part files ICE50 contains For ATmega128 it is also possible to choose ATmega103 compatibility mode 2 Select between...

Page 42: ...tion In addition two buttons called ICE Reset and Set Default are located in the lower left cor ner See Figure 5 4 The ICE Reset button resets the ICE while the set Default button loads the default settings ICE reset performs the same reset as the reset button on the back of the ICE50 ...

Page 43: ... and Lock bits It is now possible to view 4 different settings Note that Fuses marked with do not affect emulation Figure 5 5 Fuse and Lock Bits Settings 1 By pressing Extended Fuse the tree expands and it is possible to see the set tings for this fuse 0 indicates on or Fuse programmed 1 indicates off It is not possible to edit the Fuse setting here The Extended Fuses are available for selected pa...

Page 44: ...e settings can not be edited here See the datasheet for the part when configuring the Fuses See Figure 5 7 Figure 5 7 Low Fuse Settings 3 By pressing High Fuse the tree expands and it is possible to see the settings for this Fuse 0 indicates on 1 indicates off The Fuse settings can not be edited here See the datasheet for the part when configuring the Fuses Note that Fuses marked with do not affec...

Page 45: ... Figure 5 8 High Fuse Settings Tip Not all fuse settings are supported by the ICE50 The following fuses are ignored OCDEN On Chip debug is not available in ICE50 SPIEN Serial Programming not available EESAVE Not available in ICE50 JTAGEN Not available in ICE50 ...

Page 46: ...Bits By pressing Lock bits the tree expands and it is possible to see the Lock bit settings 0 indicates on 1 indicates off The fuse settings can not be edited here See the datasheet for the part when configuring the Lock bits See Figure 5 9 Figure 5 9 Lock Bits Settings ...

Page 47: ... In addition two buttons called ICE Reset and Set Default are located in the lower left corner See figure below The ICE Reset button performs a warm emulator reset and can be used instead of the reset button on the back of the ICE50 while the Set Default button loads the default setting for the actual part Figure 5 10 ICE Status Reports for the different FPGA configuration files and the hardware r...

Page 48: ...Configuring AVR Studio 5 10 ICE50 User Guide 2523A AVR 11 02 Figure 5 11 ICE Staus Window ...

Page 49: ...or Select application or Boot Reset Vector 3 Boot Lock Protection mode0 Application section Select between four different types See datasheet for the actual part for more information 4 Boot Lock Protection mode1 Boot section Select between four different types See datasheet for the actual part for more information Note This menu is only available for AVR parts with Boot Block Figure 5 12 Boot Bloc...

Page 50: ...he two checkboxes in the upper right corner makes it possible to Disable sourcing of XTAL2 clock Enable Watchdog Timer always on Watchdog ca be configured to break on Watchdog overflow or reset on Watchdog overflow Figure 5 13 Special Settings In addition two buttons called ICE Reset and Set Default are located in the lower left cor ner The ICE Reset button resets the ICE while the Set Default but...

Page 51: ...ear Figure 5 14 ICE50 Upgrade Window From this window it is possible to select two buttons The Start Upgrade button will per form an upgrade of the ICE50 Note If the skip Version check checkbox is marked all modules and part files will be upgraded If the Allow Downgrade checkbox is marked the ICE 50 firmware can be downgraded The ICE50 Info button shows the current firmware version in all modules ...

Page 52: ...Configuring AVR Studio 5 14 ICE50 User Guide 2523A AVR 11 02 Figure 5 15 Version Information ...

Page 53: ...n for more information 6 1 Electrical Compatibility ICE50 is created to emulate an actual AVR device in detail When it comes to electrical compatibility some issues must be considered They are described in this section 6 1 1 Power The POD is protected against wrong polarity from the target power In addition the POD will not be powered when ICE50 power is disabled See Figure 6 1 Figure 6 1 Power 6 ...

Page 54: ...ions See Available Clock Options for an overview of the supported modes Other modes can however easily be emulated using the modes above 6 5 Differences Between Emulator and Part The ATmega8 personality adapter SNR A9902 3 1390 A does not support External Timer Oscillator ADC internal voltage reference is 2 5V and not 2 56V as in part Resetable Fuse POD I O Probe I O Table 6 1 Target Voltage Targe...

Page 55: ...F8 Press F8 once for Trace to start at this line Press F8 twice for Trace to end at this line Press F8 three times to remove Trace Alternatively the icons on the Trace tool bar menu can be used instead of F8 The hand is equal to Trace start and stop The hands with red marks will remove all Trace points Trace on is marked with a 1 while trace off is marked by a 1 with a red line across See Figure 7...

Page 56: ...will of course vary with the actual project Figure 7 6 Trace Buffer The Trace function of the ICE50 traces the program execution every clock cycle trace every single cycle in the execution The Trace view contains the columns described below A more detailed description of the contents of each column for the individual AVR instruction is found in the section Contents of Trace Window based on Instruc...

Page 57: ... is left blank Data Address Column Dat Addr This column contains the active address in the data memory space and only contains information during some cycles in instructions reading from or writing to the data memory See the description of the instructions to see what this field means for each instruction Register File Low High Value column RL RH For some of the instructions the result being fed b...

Page 58: ...action N A N A Z C N V S H SBC Rd Rr Address of instruction Result of subtraction N A N A Z C N V S H SBCI Rd K Address of instruction Result of subtraction N A N A Z C N V S H SBIW Rdl K 1 Address of instruction 1 Result of subtraction low byte 1 N A 1 N A Z C N V S H 2 Address of next instruction 2 Result of subtraction high byte 2 N A 2 N A AND Rd Rr Address of instruction Result of logical AND...

Page 59: ... Result of multiplication 2 N A 2 N A FMUL Rd Rr 1 Address of instruction 1 N A 1 N A 1 N A Z C 2 Address of next instruction 2 Result of multiplication 2 N A 2 N A FMULS Rd Rr 1 Address of instruction 1 N A 1 N A 1 N A Z C 2 Address of next instruction 2 Result of multiplication 2 N A 2 N A FMULSU Rd Rr 1 Address of instruction 1 N A 1 N A 1 N A Z C 2 Address of next instruction 2 Result of multi...

Page 60: ...uction 1 N A 1 N A 1 N A N A 2 Address of next instruction 2 Value read 2 Address read from Y 2 Value read LD Rd Y 1 1 Address of instruction 1 N A 1 N A 1 N A N A 2 Address of next instruction 2 Value read 2 Address read from Y 2 Value read LD Rd Y 1 1 Address of instruction 1 N A 1 N A 1 N A N A 2 Address of next instruction 2 Value read 2 Address read from Y 2 Value read LDD Rd Y q 1 1 Address ...

Page 61: ...uction 1 N A 1 N A 1 N A N A 2 Address of next instruction 2 N A 2 Address written to Y 2 Value written STD Y q Rr 1 Address of instruction 1 N A 1 N A 1 N A N A 2 Address of next instruction 2 N A 2 Address written to Y q 2 Value written ST Z Rr 1 1 Address of instruction 1 N A 1 N A 1 N A N A 2 Address of next instruction 2 N A 2 Address written to Z 2 Value written ST Z Rr 1 1 Address of instru...

Page 62: ...ord address of data read 3 Data read 3 N A 3 N A ELPM Rd Z 1 Address of instruction 1 NA 1 N A 1 N A N A 2 Address of next instruction 2 N A 2 N A 2 N A 3 Word address of data read 3 Data read 3 N A 3 N A SPM 1 Address of instruction 1 N A 1 N A 1 N A N A 2 Address of next instruction 2 N A 2 N A 2 N A 3 Word address of data write 3 Data write 3 N A 3 N A IN Rd P Address of instruction Value read ...

Page 63: ...nstruction 2 Address of address part of instruction 3 N A 4 Address of CALL destination 1 N A 2 N A 3 N A 4 N A 1 N A 2 N A 3 Stack Pointer 4 Stack Pointer 1 N A 2 N A 3 Return address low byte 4 Return address high byte N A RET 1 1 Address of instruction 2 N A 3 N A 4 N A 1 N A 2 N A 3 N A 4 N A 1 N A 2 Stack Pointer 3 Stack Pointer 4 N A 1 N A 2 Return address high byte 3 Return address low byte...

Page 64: ...uction 4 2 Address of skipped instruction first word 4 3 Address of skipped instruction second word 4 1 N A 4 2 N A 4 3 N A 4 1 5 LSB give I O address A 4 2 N A 4 3 N A 4 1 N A 4 2 N A 4 3 N A 4 SBIS 1 Address of instruction 2 1 N A 2 1 5 LSB give I O address A 2 1 N A 2 N A 1 Address of instruction 3 2 Address of skipped instruction 3 1 N A 3 2 N A 3 1 5 LSB give I O address A 3 2 N A 3 1 N A 3 2...

Page 65: ...ction 6 1 N A 6 1 N A 6 1 N A 6 N A 1 Address of instruction 5 2 N A 5 1 N A 5 2 N A 5 1 N A 5 2 N A 5 1 N A 5 2 N A 5 BRGE 1 Address of instruction 6 1 N A 6 1 N A 6 1 N A 6 N A 1 Address of instruction 5 2 N A 5 1 N A 5 2 N A 5 1 N A 5 2 N A 5 1 N A 5 2 N A 5 BRLT 1 Address of instruction 6 1 N A 6 1 N A 6 1 N A 6 N A 1 Address of instruction 5 2 N A 5 1 N A 5 2 N A 5 1 N A 5 2 N A 5 1 N A 5 2 N...

Page 66: ... 1 Address of instruction 6 1 N A 6 1 N A 6 1 N A 6 N A 1 Address of instruction 5 2 N A 5 1 N A 5 2 N A 5 1 N A 5 2 N A 5 1 N A 5 2 N A 5 BRIE 1 Address of instruction 6 1 N A 6 1 N A 6 1 N A 6 N A 1 Address of instruction 5 2 N A 5 1 N A 5 2 N A 5 1 N A 5 2 N A 5 1 N A 5 2 N A 5 BRID 1 Address of instruction 6 1 N A 6 1 N A 6 1 N A 6 N A 1 Address of instruction 5 2 N A 5 1 N A 5 2 N A 5 1 N A 5...

Page 67: ... N 1 Y N 2 Y N N A CBI 1 Address of instruction 2 Address of next instruction 1 N A 2 N A 1 Y N 2 Y N 1 Y N 2 Y N N A BST Address of instruction N A N A N A T BLD Address of instruction Y N N A N A N A SEC Address of instruction N A N A N A C CLC Address of instruction N A N A N A C SEN Address of instruction N A N A N A N CLN Address of instruction N A N A N A N SEZ Address of instruction N A N A...

Page 68: ...cessor handling an interrupt However once the pro cessor has stored the return address to the stack it will start to execute code from the interrupt vector address An example is shown in below Figure 7 7 shows the code being executed where an interrupt occurs during the execution of the instruction RJMP 0x0001 The Interrupt Acknowledge IA flag is set to 1 as can be seen in Figure 7 8 When this ins...

Page 69: ...e menu File Save as Note that the trace window must be the active window 7 8 Sleep ICE50 Trace If Trace is enabled when the microcontroller enters sleep mode sleep will be logged into the Trace Buffer This applies to all sleep modes Note however that the Time Stamp still counts while the microcontroller is asleep and this can be used to measure how long the microcontroller has been asleep when it ...

Page 70: ...Trace 7 16 ICE50 User Guide 2523A AVR 11 02 ...

Page 71: ...heck for wrong polarity Check that the power source is not too weak Power Switch doesn t work Configuration Error Not all modules have signed on See ICE Status Check if a module is missing A module not signed on will report a zero in the version field Communication Errors Check that the serial cable is connected Check that the POD is properly connected See Inserting POD into POD Bay Can t establis...

Page 72: ...Troubleshooting 8 2 ICE50 User Guide 2523A AVR 11 02 ...

Page 73: ... FAX 852 2722 1369 Japan 9F Tonetsu Shinkawa Bldg 1 24 8 Shinkawa Chuo ku Tokyo 104 0033 Japan TEL 81 3 3523 3551 FAX 81 3 3523 7581 Memory 2325 Orchard Parkway San Jose CA 95131 TEL 1 408 441 0311 FAX 1 408 436 4314 Microcontrollers 2325 Orchard Parkway San Jose CA 95131 TEL 1 408 441 0311 FAX 1 408 436 4314 La Chantrerie BP 70602 44306 Nantes Cedex 3 France TEL 33 2 40 18 18 18 FAX 33 2 40 18 19...

Page 74: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Microchip ATICE50 ATICE50MEM ATICE50POD ATICE50PROBE ...

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