2
AVR1306
8045A-AVR-02/08
2 Definitions
The definitions listed in Table 2-1 will be used throughout this document.
Table 2-1.
Definitions used in this document.
Name Description
BOTTOM
The Timer/Counter reaches the BOTTOM when it becomes zero.
MAX
The Timer/Counter reaches it MAXimum when it becomes 0xFFFF.
TOP
The Timer/Counter reaches the TOP when it becomes equal to the highest value
in the count sequence. The TOP value can be equal to the period register
(PER[H:L]) or Compare or Capture register A (CCA[H:L]), depending on the
selected Waveform Generation Mode (WGM).
UPDATE
The Timer/Counter signalizes an update when it reaches BOTTOM or TOP
depending on the selected waveform generation mode (WGM).
3 Module Overview
The XMEGA Timer/Counter (TC) modules are 16-bit Timer/Counters with input
capture and compare match with optional output to I/O pin. Typical applications
include:
•
Timing.
•
Periodic interrupt/event generation.
•
Pulse
Width
Modulation.
•
Event time stamping.
•
Event
counting.
•
Signal parameter measurements (Period, duty cycle, etc.).
3.1 Timer/Counter Variants
An XMEGA TC module is related to an I/O port through the I/O pins it can control with
the output compare module. The naming of the TC modules reflects the I/O port it is
connected and the available features for that Timer/Counter. Each TC module has a
name that follows the form: TC
xn
. TC is short for Timer/Counter,
x
indicates the port it
is connected to and n is the TC number within PORT
x
. As an example, TCD0 is
Timer/Counter 0 connected to PORTD.
Timers are available on PORTC, PORTD, PORTE or PORTF, if available on device.
Timer0 on each port has 4 compare or capture channels, while Timer1 has 2
compare or capture channels. Figure 3-1 shows how the output compare channels
are connected to the associated I/O port. Timer0 has its outputs connected to pins 0-
3 within the port, while Timer1 is mapped to pins 4 and 5.
