AVR1306
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for input capture, with the same event channels as capture sources. However, there
is a one clock-cycle delay in the propagation of the overflow bit from the low word TC
to the high word TC. This means that it is necessary to delay the event to the high
word TC to ensure the correct input capture value. To delay the event, the EVDLY bit
in the CTRLD register must be set.
It is possible to use the EVSYS.STROBE register in the event system to manually
trigger an event on any of the available event channels. This can be used as an
alternative to reading the TC directly from software.
6 Getting Started
This section describes the basic steps for getting up and running with the
Timer/Counters in different configurations. Each of the examples listed here are
implemented in the accompanying example source code.
6.1 Basic Timer/Counter Operation
Task: Set up a Timer/Counter for use as a regular timer.
1. Set the PER[H:L] register to control the period/top value of the TC. This sets the
point where the TC wraps around to zero and where the TC overflow
interrupt/event occurs.
2. Start TC by selecting a clock source (CLKSEL in CTRLA).
In this configuration, the current timer value can be read directly from the CNT[H:L]
register. The TC overflow bit indicates whether an overflow has occurred. This bit can
be used to generate interrupts at fixed intervals.
6.2 Using the Input Capture Functionality
Task: Configure TCC0 with Input Capture Channel A enabled. The Input Capture is
triggered by the falling edge of PC0.
3. Configure PC0 for input, triggered on falling edge.
4. Select PC0 as multiplexer input for event channel 0.
5. Configure TCC0 for input capture by setting event source and event action to
“Input capture” in CTRLD.
6. Enable input capture channel A by setting the CCAEN bit in CTRLB.
7. Start the TC by selecting a clock source (CLKSEL in CTRLA).
8. Wait for Input Capture Interrupt Flag A in INTFLAGS to be set.
9. Read input capture value from the CCA[H:L] register.
10. Go to step 6.
6.3 Using Input Capture to Calculate Frequency and Duty Cycle of a Signal
Task: Configure Timer/Counter C0 to measure the frequency and duty cycle of a
signal applied to PC0.
1. Select event source(s). See section 3.6 for details on this.
2. Select event action = input capture.
3. Enable input capture channels (CCENx).
4. Set PER[H:L] to 0x7FFF. (MSB must be cleared)
