ATtiny10/11/12
38
Port B as General Digital I/O
The lowermost five pins in port B have equal functionality when used as digital I/O pins.
PBn, General I/O pin: The DDBn bit in the DDRB register selects the direction of this pin, if DDBn is set (one), PBn is
configured as an output pin. If DDBn is cleared (zero), PBn is configured as an input pin. If PORTBn is set (one) when the
pin is configured as an input pin, the MOS pull-up resistor is activated. On ATtiny12 this feature can be disabled by setting
the Pull-up Disable (PUD) bit in the MCUCR register. To switch the pull-up resistor off, the PORTBn can be cleared (zero),
the pin can be configured as an output pin, or in ATtiny12, the PUD bit can be set. The port pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
n: 4,3…0, pin number.
Note that in ATtiny10/11, PB5 is input only. On ATtiny12, PB5 is input or open-drain output. Because this pin is used for
12V programming, there is no ESD protection diode limiting the voltage on the pin to V
CC
+ 0.5V. Thus, special care should
be taken to ensure that the voltage on this pin does not rise above V
CC
+ 1V during normal operation. This may cause the
MCU to reset or enter programming mode unintentionally.
Alternate Functions of Port B
All port B pins are connected to a pin change detector that can trigger the pin change interrupt. See “Pin Change Interrupt”
on page 26 for details. In addition, Port B has the following alternate functions:
•
RESET - Port B, Bit 5
When the RSTDISBL fuse is unprogrammed, this pin serves as external reset. When the RSTDISBL fuse is programmed,
this pin is a general input pin. In ATtiny12, it is also an open-drain output pin.
•
XTAL2 - Port B, Bit 4
XTAL2, oscillator output. When this pin is not used for clock purposes, it is a general I/O pin. Refer to section “Pin Descrip-
tions” on page 5 for details.
•
XTAL1 - Port B, Bit 3
XTAL1, oscillator or clock input. When this pin is not used for clock purposes, it is a general I/O pin. Refer to section “Pin
Descriptions” on page 5 for details.
•
T0/SCK - Port B, Bit 2
This pin can serve as the external counter clock input. See the timer/counter description for further details. If external
timer/counter clocking is selected, activity on this pin will clock the counter even if it is configured as an output. In ATtiny12
and serial programming mode, this pin serves as the serial clock input, SCK.
•
INT0/AIN1/MISO - Port B, Bit 1
This pin can serve as the external interrupt0 input. See the interrupt description for details on how to enable this interrupt.
Note that activity on this pin will trigger the interrupt even if the pin is configured as an output. This pin also serves as the
negative input of the on-chip Analog Comparator. In ATtiny12 and serial programming mode, this pin serves as the serial
data input, MISO.
Table 20. DDBn Effects on Port B Pins
DDBn
PORTBn
I/O
Pull-up
Comment
0
0
Input
No
Tri-state (Hi-Z)
0
1
Input
Yes
PBn will source current if ext. pulled low. In ATtiny12 pull-ups can be disabled by setting
the PUD bit.
1
0
Output
No
Push-pull Zero Output
1
1
Output
No
Push-pull One Output
