Atmel ATA3741 Series, Operating

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21
4899B–RKE–10/06
ATA3741
To indicate that condition, the receiver displays a reset marker (RM) at pin DATA after a reset.
The RM is represented by the fixed frequency f
RM
at a 50% duty cycle. RM can be canceled via
an “L” pulse t1 at pin DATA. The RM implies the following characteristics:
• f
RM
is lower than the lowest feasible frequency of a data signal. By this means, RM cannot be
misinterpreted by the connected microcontroller.
• If the receiver is set back to polling mode via pin DATA, RM cannot be canceled by accident if
t1 is applied according to the proposal in Section “Programming the Configuration Register”
on page 21 .
By means of that mechanism, the receiver cannot lose its register information without communi-
cating that condition via the reset marker RM.
Figure 5-13. Generation of the Power-on Reset
Figure 5-14. Timing of the Register Programming
5.5.2 Programming the Configuration Register
The configuration registers are programmed serially via the bi-directional data line as shown in
Figure 5-14 and Figure 5-15 on page 22 .
VS
POR
DATA (ATA3741)
X
1/f
RM
V
ThReset
t
Rst
Out1
(microcontroller)
DATA (ATA3741)
Serial bi-directional
data line
X
Bit 1
("0")
(Start bit)
Bit 2
("1)
(Register select)
Bit 13
("0")
(Poll8)
Bit 14
("1")
(Poll8R)
X
t1 t2 t3
t4
t5
t6
t8
t7
X
X
T
Sleep
Programming Frame
Receiver
on
Startup
mode
t9