-24
Ballast Demonstrator User Guide
7629A–AVR–04/06
Figure 6-2.
Positive Line Half Cycle
1.dV = 2Vpk-Vo-2V
D
2.dQ = CdV or C = dQ/dV
For example, to obtain 15 ma at 20 VDC from a 220 Vrms 50 Hz line:
1.dQ/dt = (15 millijoules/sec)/(50 cycles/sec) or 0.3 millijoules / cycle.
2.Over 1 cycle, the coupling capacitor (C1) will charge from –220V x 1.4 to
+220V x 1.4 – 20V- V
D
. dV = 2*Vpk-Vo-2V
D
. dV ~= 600V.
3. The required C1 ~ 0.3 millijoules/600V or 0.5 uF
In practice, C1 may have to be larger depending on the amount of ripple allowed by C2
and to account for component tolerances, minimum voltage, and current in the regulator
diode. C1 must be a non-polarized type with a voltage rating to withstand the peak line
voltage including transients. A high quality film capacitor is recommended.
6.2
Appendix 2: PFC
Basics
The function of the PFC boost regulator is to produce a regulated DC supply voltage
from a full wave rectified AC line voltage while maintaining a unity power factor load.
This means that the current drawn from the line must be sinusoidal and in phase with
the line voltage.
The ballast PFC circuit accomplishes this by means of a boost converter operating (See
Figure 6-3) at critical conduction so that the current waveform is triangular (See Figure
6-4).
Figure 6-3.
PFC Boost Regulator
AC
C1
V
D
V
D
C2
“Positive” line half -cycle:
C1 charges to Vpk - V
D
- Vo with polarity shown.
Vo
Ich2
I
DC
+V
PK
+ V
C1
-
PFC Inductor
PFC BOOST REGULATOR
POWER
VOLTAGE
Vin
Vbus
Ion = (Vin x t )/ L
Ioff
PFC Switch
