ASUS Book Size Barebone System
6-21
6.4.1 Chip Configuration
SDRAM CAS Latency
(value depends on SDRAM SPD)
This item controls the latency between the SDRAM read command and
the time the data actually becomes available. Configuration options: [1.5T]
[2T] [2.5T]
SDRAM RAS to CAS Delay
(value depends on SDRAM SPD)
This item controls the latency between the DDR SDRAM active command
and the read/write command. Configuration options: [2T] [3T].
SDRAM Configuration [By SPD]
This parameter allows you to set the optimal timings for items 2–5,
depending on the memory modules that you are using. The default setting
is [By SPD], which configures items 2–5 by reading the contents in the
SPD (Serial Presence Detect) device. The EEPROM on the memory
module stores critical information about the module, such as memory type,
size, speed, voltage interface, and module banks.
Configuration options: [User Defined] [By SPD]
The SDRAM parameters (items 2~5) become configurable only when
you set the SDRAM Configuration to [User Defined].
