[AK4458]
014011794-E-01
2015/08
- 71 -
Addr Register Name
D7
D6
D5
D4
D3
D2
D1
D0
02H Control 3
DP
0
DCKS
DCKB
MONO1
DZFB
SELLR1
SLOW
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
SLOW: Slow Roll-off Filter Enable. (
Table 12
)
0: Sharp roll-off filter (default)
1: Slow roll-off filter
SELLR1: The data selection of DAC1 L channel and R channel, when MONO mode (
Table 22
)
Default value is “0”.
DZFB: Inverting Enable of DZF (
Table 21
)
0: DZF pin goes “H” at Zero Detection (default)
1: DZF pin goes “L” at Zero Detection
MONO1: DAC1 enters monaural output mode when MONO bit = “1”. (
Table 22
)
0: Stereo mode (default)
1: MONO mode
DCKB: Polarity of DCLK (DSD Only)
0: DSD data is output from DCLK falling edge. (default)
1: DSD data is output from DCLK rising edge.
DCKS: Master Clock Frequency Select at DSD mode (DSD only)
0: 512fs (default)
1: 768fs
DP: DSD/PCM Mode Select
0: PCM Mode (default)
1: DSD Mode
The AK4458 must be reset by RSTN bit when changing DP bit setting.
Addr Register Name
D7
D6
D5
D4
D3
D2
D1
D0
03H L1ch ATT
ATT7
ATT6
ATT5
ATT4
ATT3
ATT2
ATT1
ATT0
04H R1ch ATT
ATT7
ATT6
ATT5
ATT4
ATT3
ATT2
ATT1
ATT0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
1
1
1
1
1
1
1
1
ATT7-0: Attenuation Level (
Table 18
)
Default value is “FF” (0dB)