[AK4458]
014011794-E-01
2015/08
- 17 -
■
DSD Mode Characteristics
(1) DSDF bit= “0”
(Ta=-40
105
C; AVDD=3.0
5.5V, TVDD=1.7
3.6V; fs=44.1kHz; D/P bit=“1”, DSDF bit=“0”)
Parameter
Min.
Typ.
Max.
Unit
Digital Filter Response
Frequency
Response
(
Note 22
)
DSDSEL[1:0]
“00”
20kHz
50kHz
100kHz
-0.8
-5.5
-19.9
dB
“01”
40kHz
200kHz
400kHz
-0.8
-5.5
-19.9
dB
“10”
80kHz
400kHz
800kHz
-0.8
-5.5
-19.9
dB
(2) DSDF bit= “1”
(Ta=-40
105
C; AVDD=3.0
5.5V, TVDD=1.7
3.6V; fs=44.1kHz; D/P bit=“1”, DSDF bit=“1”)
Parameter
Min.
Typ.
Max.
Unit
Digital Filter Response
Frequency
Response
(
Note 22
)
DSDSEL[1:0]
“00”
20kHz
100kHz
200kHz
-0.2
-6.3
-23.7
dB
“01”
40kHz
200kHz
400kHz
-0.2
-6.3
-23.7
dB
“10”
80kHz
400kHz
800kHz
-0.2
-6.3
-23.7
dB
Note 22. In DSD mode, the signal level is ranging from 25% to 75%. Peak levels of DSD signal above this duty
are not recommended by SACD format book (Scarlet Book).
Note 23. It is assumed that the output level is 0dB when the input signal is 1kHz and the duty range is between
25 ~ 75%.The output level is assumed as 0dB when applying a 1kHz sine wave in 25~ 75% duty.
*Digital filter characteristics are based on simulation results.
■
DC Characteristics
(Ta=-40
105
C; AVDD=3.0
5.5V, TVDD=1.7
3.6V)
Parameter
Symbol
Min.
Typ.
Max.
Unit
TVDD=1.7
3.0V
High-Level Input Voltage
Low-Level Input Voltage
VIH
VIL
80%TVDD
-
-
-
-
20%TVDD
V
V
TVDD=3.0V
3.6V
High-Level Input Voltage
Low-Level Input Voltage
VIH
VIL
70%TVDD
-
-
-
-
30%TVDD
V
V
High-Level Output Voltage
(LRCK, BICK pins: Iout=-100µA)
Low-Level Output Voltage
(excpt SDA pin : Iout= 100µA)
(SDA pin, 2.0V
TVDD
3.6V: Iout= 3mA)
(SDA pin, 1.7V
TVDD
2.0V: Iout= 3mA)
VOH
VOL
VOL
VOL
TVDD
0.5
-
-
-
-
-
-
-
0.5
0.4
20%TVDD
V
V
V
V
Input Leakage Current
Iin
-
-
10
A
