Artesyn Embedded Technology MVME7100ET, Programmer'S Reference Manual

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Programming Details
MVME7100ET Single Board Computer Programmer’s Reference (6806800K88B)
67
4.13.1 System Clock
The system clock is driven by an oscillator. The following table defines the clock frequencies for
various configurations.
4.13.2 Real Time Clock Input
The RTC clock input is driven by 1 MHz clock generated by the Control and Timers PLD. This
provides a fixed clock reference for the MC864xD PIC timers, which software can use as a
known timing reference.
QUART CLK_1.8M 1.8432 Oscillator 1 +3.3 V
RTC CLK_32K 32.768 KHz Crystal 1 +3.3 V
ICS9FG108 CLK4_25MHZ 25 Oscillator 1 +3.3 V
PEX8525 CLK_PCIE0 100 ICS9FG108 1 DIFF
PEX8114 CLK_PCIE1 100 ICS9FG108 1 DIFF
PEX8114 CLK_PCIE2 100 ICS9FG108 1 DIFF
PEX8114 CLK_PCIE3 100 ICS9FG108 1 DIFF
PEX8112 CLK_PCIE4 100 ICS9FG108 1 DIFF
MC864xD CLK_PCIE5 100 ICS9FG108 1 DIFF
MC864xD CLK_PCIE6 100 ICS9FG108 1 DIFF
XMCspan CLK_PCIE7 100 ICS9FG108 1 DIFF
Table 4-12 Clock Assignments (continued)
Device Clock Signals
Frequency
(MHz)
Clock Tree Source Qty VIO
Table 4-13 Clock Frequencies
SYSCLK Core MXP (Platform) DDR2
66.67 MHz 1.3 GHz 533 MHz 266 MHz
66.67 MHz 1.067 GHz 533 MHz 266 MHz