AVS-500 Series Machine Vision User Manual
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Prefetchable Memory 10
Reseved Memory Alignment 1
Prefetchable Memory Alignment 1
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PCI Express Root Port 5
PCI Express Root Port 5 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 SubStates [L1.1&L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP 5
DPTP 7
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout 0
Extra Bus Reserved 0
Reserved Memory 10
Reserved I/O 4
PCH PCIe LTR Configuration
PCH PCIE5 LTR [Enabled]
Snoop Latency Override [Auto]
Non-Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE5 LTR Lock [Disabled]
PCH PCIe CLKREQ# Configuration