Analog Devices ADZS-BF707-BLIP2, Manual

Page: 28 / 60

Power Architecture
1-10 ADZS-BF707-BLIP2 Board Evaluation System Manual
connector for the SPI1 port, 3.2V supply, and ground. Note that any SPI1
pin can also be configured as GPIO. For pinout information, go to
ADZS-BF707-BLIP2 Board Schematic .
Power Architecture
The ADZS-BF707-BLIP2 board has three primary voltage domains: 3.2V,
1.1V, and 1.8V. The power input is a 5V wall adaptor.
The Analog Devices ADP2370 voltage regulator provides 3.2V for the
VDD_EXT
signal and the 3.2V power requirements of the board. The
ADP2230 voltage regulator provides 1.1V for the
VDD_INT
signal in addi-
tion to providing 1.8V for the
VDD_DMCO
signal. The ADP195 load switch
is used to create a collapsible power domain to save power during hiber-
nate mode. The ADP220 voltage regulator provides 2.8V to the CMOS
imaging sensors.
Example Programs
Example programs are provided with the ADZS-BF707-BLIP2 Board
Support Package to demonstrate various capabilities of the product. The
programs can be found in the
ADZS_BF707_BLIP2_Board-Rel1.0.0\Black-
fin\Examples
folder. The number after the “Rel” could be higher for
newer versions. Refer to a readme file provided with each example for
more information.