ADSP-TS201S EZ-KIT Lite Evaluation System Manual
I-3
INDEX
M
memory
map, of this EZ-KIT Lite,
select pins, See ~BMS, ~MS0,
microphones,
~MS0 memory bank 0 select pins,
,
MSSD0 external memory space,
N
notation conventions,
O
oscillators (U18),
P
package contents,
power
connector (J8),
regulators,
supply specifications,
processor IDs,
,
,
See
flags by name
(FLAGs)
push buttons
push buttons by name (SWx)
diagram of locations,
R
registration, of this product,
reset
master (LED8),
processor,
push button (SW3),
resistors
diagram of locations,
clock mode settings,
drive strength selection,
processor ID settings,
restrictions, of the license,
RJ-45 connectors,
,
S
schematic, of this EZ-KIT Lite,
SCLK pins,
SCLKRAT2-0 pins,
,
,
SDRAM
interface,
SDRCON registers,
setup, of this EZ-KIT Lite,
SOC registers,
specifications, of the power supply,
SQSTAT registers,
startup, of this EZ-KIT Lite,
SW10 (FLAG/IRQ) DIP switch,
SW1 (audio amplification) switch,
SW2 DIP switch,
,
SW3 (reset) push button,
SW4 (IRQ0_A) push button,
,
SW5 (IRQ0_B) push button,
,
SW6 (FLAG0_B) push button,
,
SW7 (FLAG1_B) push button,
,
SW8 (FLAG1_A) push button,
SW9 (FLAG0_A) push button,
SYSCON registers,
,
system architecture, of this EZ-KIT Lite,
T
TX port,