Analog Devices ADSP-TS201S EZ-KIT Lite, Manual

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INDEX
I-2 ADSP-TS201S EZ-KIT Lite Evaluation System Manual
DS2-0 pins, 2-15
E
EPROM boot mode, 2-7
example programs, 1-13
expansion interface, 2-3 , 2-9 , 2-22
external
interrupts, 1-11
memory, xi , 1-7 , 2-4
memory space (MSSD0), 1-8
ports, 2-3
voltage regulator, 2-3
EZ-KIT Lite board architecture, 2-2
F
features, of this EZ-KIT Lite, x
field-programmable gate arrays (FPGAs), ix
FLAG
LEDs (LED3-6), 2-17
push buttons (SW6-9), 2-18
source switch (SW10), 2-9
FLAG0_A (SW9) pins, 1-11 , 2-18
FLAG0_B (SW6) pins, 1-11 , 2-18
FLAG1_A (SW8) pins, 1-11 , 2-18
FLAG1_B (SW7) pins, 1-11 , 2-18
FLAG2_A (LED4) pins, 1-11 , 2-18
FLAG2_B (LED5) pins, 1-11 , 2-18
FLAG3_A (LED6) pins, 1-11 , 1-12 , 2-18
FLAG3_B (LED3) pins, 1-11 , 1-12 , 2-18
FLAGREG registers, 1-10
flash memory
boot memory select pins, 2-3
map of, 1-9
frequency, 1-13 , 2-12
G
general-purpose IO pins, -xi , 2-18
GND pins, 2-23
I
impedance selection, 2-14
input clock, 2-3
installation, of this EZ-KIT Lite, 1-5
interface connectors, xi
internal
DRAM power regulator, 2-2
memory, 1-7 , 1-8 , 2-4
interrupt
enable settings (SW2), 2-8
pins (IRQ3-0), 1-11
push buttons (SW4-5), 2-19
source switch (SW10), 2-9
IRQ0_A (SW4) interrupt pins, 1-11 , 2-19
IRQ0_B (SW5) interrupt pins, 1-11 , 2-19
J
JTAG
connector (ZP4), 2-4 , 2-21
emulation port, 2-4
L
LEDs
diagram of locations, 1-4 , 2-16
LED1 (power), 2-16
LED3 (FLAG3_B), 1-11 , 2-18
LED4 (FLAG2_A), 1-11 , 2-18
LED5 (FLAG2_B), 1-11 , 2-18
LED6 (FLAG3_A), 1-11 , 2-18
LED8 (master reset), 2-16
ZLED3 (USB monitor), 1-5 , 2-18
license restrictions, 1-7
link ports
connections, 1-12
width settings (SW2), 2-8
LVDS signaling, 1-12