Evaluation Board User Guide
UG-500
Rev. 0 | Page 7 of 15
EVALUATION BOARD OVERVIEW
R3
C5
C4
JP1
J3
J11
U2
JP2
JP3
C3
D1
J1
1
J2
1
9
8
7
2
19
18
17
16
15
14
13
12
11
10
1
TP4
TP3
TP6
TP5
TP20
C1
C2
C12
C6
U1
U3
J8
J10
J7
J6
J5
R18
R17
R16
R6
R13
R5
R2
R8
R15
R14 R1
R7
R11
R10
THR
5
20
16
14
20
10
CBP
SYS_EN
BAT_SNS
VCO_LDO
ISO_B_S
ISO_S_S
D3
D1
D2
IL
ED
IS
O_
S_
F
VD
DI
O
D3
D2
D1
GND
BAT_SNS
THR
SYS_EN
GND
ADP
506
2 Q
FN20
DEMO
EC
IV
ED
OL
A
N
A
S
G
VIN_F
GND
ILED
GND
GND
GND
D3
S
D3
D1S
VIN_F
ISO_S_F
ISO_B_F GND
GND
SCL
GND
GND
ISO_S_F
ISO_S_F
ISO_S_S
ISO_B_S
ISO_B_S
VIN_S
GND_S
THR
ILED_S
AGND
BAT_SNS
ISO_B_F
SDA
D2S
D2
D1
VIN_S
SDA
VIN_F
SCL
SM
U
or
Battery
GND
Battery
The
rm
is
to
r
R
S
Sys
tem Lo
ad
GND
VI
N 5.
0 V
GN
D
Figure 5.
ADP5062
LFCSP Demo Board Typical Operation Setup.
TYPICAL OPERATION
The typical test setup for the
ADP5062
charger consists of a dc
power supply unit (PSU) for VIN_F, a source meter unit (SMU)
or a battery simulator for the ISO_B_x pins, and a variable
power resistor or electronic load for the ISO_S_x pins.
The SMU at the ISO_B node must have a 100 mΩ to 250 mΩ
resistor (R
S
) in series with its positive lead. The resistor emulates
the equivalent series resistance of a real battery. Some SMU
models that have been successfully used for the ISO_Bx node
include the following:
Keithley 2306 battery simulator
Keithley 2602A SMU
Agilent 6784A/6762A SMU
INPUT CURRENT
Measuring Total Input Current (I
VIN
)
When measuring VINx input quiescent currents, take into
account that the evaluation board includes an LDO (U1) and
I
2
C input/output (I/O) expander (U2A, U3A in Figure 7). The
LDO generates a 3.4 V VDDIO voltage for the I
2
C bus and
SYS_EN open-drain output, and the I/O expander controls
digital inputs DIG_IO1, DIG_IO2, and DIG_IO3.
In the
ADP5062
evaluation board typical setup, the U1 and the
U3 are powered through a pin header, J3. Typically, the combined
current consumption of the U1 and the U3 are in the range of
1 mA to 2 mA. To separate the evaluation board quiescent
current from the
ADP5062
VINx quiescent current, leave J3
open and connect a second dc power supply (3.5 V to 5.0 V) to
the test-point TP5 (see Figure 6).
