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1.2 Theory of Operation
1.2.1 How the Ammasso Adapter Works
The Ammasso 1100 is an Ethernet adapter designed to take advantage of various standard
interfaces, including MPI, DAPL, and traditional BSD sockets.
For use with MPI and/or DAPL, the Ammasso 1100 leverages its RDMA capabilities and
uses its on-board processing engine to quickly decipher the header information, determines
where the information needs to go, and handles any network processing that needs to be done
without involving the host CPU. Through this approach, the adapter limits the need to make
data copies, limits the amount of host CPU processing necessary, and places data directly
into application memory, thereby maximizing performance.
Additionally, the adapter can be used to support sockets based traffic as well. When using the
BSD sockets interface, the Ammasso 1100 operates at performance levels consistent with
other high-end gigabit sockets based adapters. The adapter supports sockets by maintaining a
separate IP address within the card for sockets traffic and rapidly moving that traffic to the
host network stack, where it can be processed normally.
Having support for both a high performance path and sockets path allows a single cable
connection and switch data port for all traffic types, either sockets or fast-path RDMA based,
simplifying network environments and management.
1.2.2 How Remote Direct Memory Access (RDMA) Works
Once a connection has been established, RDMA enables the movement of data from the
memory of one server directly into the memory of another server without involving the
operating system of either node. RDMA supports zero-copy networking by enabling the
network adapter to transfer data directly to or from application memory, eliminating the need
to copy data between application memory and the data buffers in the operating system. When
an application performs an RDMA Read or Write request, the application data is delivered
directly to the network, hence latency is reduced and applications can transfer messages
faster (see Figure 1).