List of Figures
vii
24309E—March 2002
AMD Athlon™ XP Processor Model 6 Data Sheet
Preliminary Information
List of Figures
Figure 1.
Typical AMD Athlon™ XP Processor Model 6 System
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Figure 2.
Logic Symbol Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3.
AMD Athlon XP Processor Model 6 Power Management
States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 4.
AMD Athlon System Bus Disconnect Sequence in the
Stop Grant State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 5.
Exiting the Stop Grant State and Bus Connect Sequence . . . . 16
Figure 6.
Northbridge Connect State Diagram . . . . . . . . . . . . . . . . . . . . . 17
Figure 7.
Processor Connect State Diagram . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 8.
VCC_CORE Voltage Waveform . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 9.
SYSCLK and SYSCLK# Differential Clock Signals . . . . . . . . . 32
Figure 10. SYSCLK Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 11. General ATE Open Drain Test Circuit . . . . . . . . . . . . . . . . . . . . 38
Figure 12. Signal Relationship Requirements During Power-Up
Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 13. AMD Athlon XP Processor Model 6 OPGA Package . . . . . . . . 49
Figure 14. AMD Athlon XP Processor Model 6 Pin Diagram—
Topside View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Figure 15. AMD Athlon XP Processor Model 6 Pin Diagram—
Bottomside View. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 16. OPN Example for the AMD Athlon XP Processor
Model 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75