Universal Serial Bus (USB)
Am186™CC/CH/CU Microcontrollers User’s Manual
18-17
18.5.2.2
USB Reset
Hardware sets the USB_RST bit in the UISTAT2 register when a USB reset signal is detected
on the USB bus. The USB_RST bit can be enabled as an interrupt source by setting the
corresponding bit in the UIMASK2 register.
18.5.2.3
USB Protocol Handling, IN Direction
For endpoints that are configured for the IN direction (transmit), data to be sent to the USB
host is placed in the endpoint FIFO by the device software or the DMA controller.
When the USB host issues an IN token packet to the endpoint, the controller hardware
converts the data stored in the endpoint’s FIFO into a serial data stream, computes the
CRC, performs the bit stuffing operation, and generates the NRZI converted data stream.
At the same time, it assembles the data packet in the correct format, including the SYNC,
PID, DATA, CRC, and EOP fields as required by the USB specification.
Finally, the USB peripheral controller drives the data stream out to the USB host through
the integrated transceiver drivers on the USBD+ and USBD– signal lines (or to an external
transceiver if one is used).
The device software is responsible for filling the endpoint’s FIFO before starting the
transaction, and for keeping the FIFO full during the transaction, if necessary. If a packet
error occurs, the device software is responsible for responding appropriately. For bulk
transfers, this entails refilling the endpoint FIFO with the data that was sent in the last frame.
For isochronous transfers, the software must proceed to fill the FIFO with data for the next
packet. For more information, see “Error Recovery on Bulk and Interrupt Endpoints” on
page 18-22 and “Error Recovery on Isochronous Endpoints” on page 18-23.
The controller hardware automatically generates the appropriate USB handshake packets
for the various transfer types. The device software can cause the endpoint to enter its stalled
condition when appropriate.
18.5.2.4
USB Protocol Handling, OUT Direction
For endpoints that are configured in the OUT direction (receive), the USB peripheral
controller receives the serial data stream from the USB host. The USB peripheral controller
hardware identifies the incoming SYNC field, performs the NRZI-to-NRZ conversion,
performs the bit-stripping operation, decodes the PID, and tests the device’s ADDR and
ENDP fields. For packets that are addressed to the device and an enabled endpoint number,
the USB peripheral controller performs the serial-to-parallel conversion and places the data
into the endpoint’s FIFO.
During this process, the endpoint hardware checks the packet’s CRC, Data toggle sense,
and all handshake packets. In addition, the controller hardware monitors the number of
data bytes sent by the host. If the number of bytes sent exceeds the endpoint’s maximum
packet size, the USB peripheral controller automatically flags an error and sends a negative
acknowledge packet to the host if the endpoint type is bulk, control, or interrupt.
The primary responsibility of the device software or DMA controller is to move data written
into the endpoint’s FIFO to system memory or some other microcontroller peripheral. The
device software must also monitor the USB peripheral controller to service packet errors
that are detected during reception.
The appropriate USB handshake packets are generated automatically by the controller
hardware for the various transfer types and error conditions. The device software can also
cause the endpoint to enter its stalled condition when appropriate.
Summary of Contents for Am186 CC
Page 1: ...Am186 CC CH CU Microcontrollers User s Manual Order 21914B...
Page 4: ...iv Am186 CC CH CU Microcontrollers User s Manual...
Page 18: ...Table of Contents xviii Am186 CC CH CU Microcontrollers User s Manual...
Page 24: ...Introduction xxiv Am186 CC CH CU Microcontrollers User s Manual...
Page 40: ...Architectural Overview 1 16 Am186 CC CH CU Microcontrollers User s Manual...
Page 86: ...System Overview 3 36 Am186 CC CH CU Microcontrollers User s Manual...
Page 92: ...Emulator Support 4 6 Am186 CC CH CU Microcontrollers User s Manual...
Page 112: ...DRAM Controller 6 8 Am186 CC CH CU Microcontrollers User s Manual...
Page 134: ...Interrupts 7 22 Am186 CC CH CU Microcontrollers User s Manual...
Page 186: ...Programmable I O Signals 9 8 Am186 CC CH CU Microcontrollers User s Manual...
Page 200: ...Watchdog Timer 11 6 Am186 CC CH CU Microcontrollers User s Manual...
Page 232: ...Asynchronous Serial Ports UARTs 13 24 Am186 CC CH CU Microcontrollers User s Manual...
Page 242: ...Synchronous Serial Port SSI 14 10 Am186 CC CH CU Microcontrollers User s Manual...
Page 264: ...High Level Data Link Control HDLC 15 22 Am186 CC CH CU Microcontrollers User s Manual...
Page 332: ...Universal Serial Bus USB 18 34 Am186 CC CH CU Microcontrollers User s Manual...
Page 348: ...Register Summary A 16 Am186 CC CH CU Microcontrollers User s Manual...
Page 376: ...Index Index 18 Am186 CC CH CU Microcontrollers User s Manual...