© 2009 Advanced Micro Devices, Inc.
AMD 780E Databook 3.10
Proprietary
List of Tables-1
List of Tables
Table 1-1: Possible Configurations for the PCI-E General Purpose Links
.....................................................................................1-3
Table 1-2: Graphics Device ID and Graphics Engine Clock Speed
.............................................................................................1-10
Table 1-3: Pin Type Codes
............................................................................................................................................................1-10
Table 1-4: Acronyms and Abbreviations
......................................................................................................................................1-11
Table 2-1: Supported DDR2 Components
......................................................................................................................................2-4
Table 2-2: DDR2 Memory Row and Column Addressing
..............................................................................................................2-4
Table 2-3: Supported DDR3 Components
......................................................................................................................................2-5
Table 2-4: DDR3 Memory Row and Column Addressing
..............................................................................................................2-5
Table 2-5: LVDS 18-bit TFT Single Pixel per Clock (Single Channel) Signal Mapping
..............................................................2-8
Table 2-6: LVDS 18-bit TFT Dual Pixel per Clock (Dual Channel) Signal Mapping
...................................................................2-9
Table 2-7: LVDS 24-bit TFT Single Pixel per Clock (Single Channel) Signal Mapping
............................................................2-11
Table 2-8: LVDS 24-bit TFT Dual Pixel per Clock (Dual Channel) Signal Mapping
.................................................................2-12
Table 2-9: Single Link Signal Mapping for DVI/HDMI™
.........................................................................................................2-14
Table 2-10: Dual-Link Signal Mapping for DVI
..........................................................................................................................2-15
Table 2-11: Support for HDMI™ Packet Type
.............................................................................................................................2-16
Table 2-12: VGA DAC Characteristics
........................................................................................................................................2-17
Table 3-1: CPU HyperTransport™ Interface
..................................................................................................................................3-5
Table 3-2: Side-Port Memory Interface
..........................................................................................................................................3-5
Table 3-3: 1 x 16 or 2 x 8 Lane PCI Express® Interface for External Graphics
............................................................................3-6
Table 3-4: 1 x 4 Lane A-Link Express II Interface for Southbridge
...............................................................................................3-6
Table 3-5: 6 x 1 Lane PCI Express® Interface for General Purpose External Devices
..................................................................3-6
Table 3-6: PCI Express® Interface for Miscellaneous PCI Express® Signals
...............................................................................3-6
Table 3-7: Clock Interface
...............................................................................................................................................................3-7
Table 3-8: CRT Interface
................................................................................................................................................................3-7
Table 3-9:
.......................................................................................................................................................................................3-8
Table 3-10: LVTM Interface in TMDS Mode
................................................................................................................................3-9
Table 3-11: TMDS Interface Multiplexed on the PCI Express® Graphics Interface
...................................................................3-10
Table 3-12: DisplayPort™ Interface Multiplexed on the PCI Express® Graphics Interface
.......................................................3-11
Table 3-13: Power Management Pins
...........................................................................................................................................3-11
Table 3-14: Miscellaneous Pins
....................................................................................................................................................3-12
Table 3-15: Power Pins
.................................................................................................................................................................3-12
Table 3-16: Ground Pins
...............................................................................................................................................................3-13
Table 3-17: Strap Definitions for the RS780E
..............................................................................................................................3-15
Table 4-1: Timing Requirements for HyperTransport Reference Clock (100MHz) Output by the Clock Generator
....................4-1
Table 4-2: PCI-E Differential Clock (GFX_REFCLK, GPPSB_REFCLK, 100MHz) AC Characteristics
...................................4-2
Table 4-3: Timing Requirements for REF_CLKP Used as OSCIN (14.3181818MHz)
.................................................................4-2
Table 4-4: Timing Requirements for the LVTM Interface in LVDS Mode
...................................................................................4-3
Table 4-5: RS780E Power Rail Power-up Sequence
......................................................................................................................4-4
Table 4-6: LCD Power Up/Down Timing
.......................................................................................................................................4-5
Table 5-1: Maximum and Minimum Ratings
..................................................................................................................................5-1
Table 5-2: DC Characteristics for 3.3V TTL Signals
.....................................................................................................................5-2
Table 5-3: DC Characteristics for DDC Signals (DDC Mode)
.......................................................................................................5-2
Table 5-4: DC Characteristics for AUX Signals (AUX Mode)
......................................................................................................5-2
Table 5-5: DC Characteristics for POWERGOOD
.........................................................................................................................5-3
Table 5-6: DC Characteristics for HyperTransport™ and PCI-E Differential Clock (HT_REFCLK, GFX_REFCLK,
GPPSB_REFCLK, 100MHz)
..........................................................................................................................................................5-3
Table 5-7: DC Characteristics for REFCLK_P Input for OSCIN (14.3181818MHz)
....................................................................5-3
Table 5-8: DC Characteristics for the Memory Interface when Supporting DDR2
........................................................................5-3
Table 5-9: DC Characteristics for the Memory Interface when Supporting DDR3
........................................................................5-4
Table 5-10: DC Characteristics for the LVTM Interface in TMDS Mode
.....................................................................................5-4
Table 5-11: DC Characteristics for the TMDS Interface Multiplexed on the PCI-E Gfx Lanes
....................................................5-5
Table 5-12: Electrical Requirements for the LVTM Interface in LVDS Mode
..............................................................................5-6