ADM-XRC-9R1 User Manual
V1.7 - 16th Sept 2020
Appendix A.2.1: Pn6 GPIO Pin Map
Signal
P6 Pin
FPGA Pin
FPGA Bank
GP0
C19
B13
88
GP1
F19
C13
88
GP2/MBIST#*
C18
K10
89
GP3
F18
A10
89
GP4
C17
H9
89
GP5
F17
C10
89
GP6
C16
H10
89
GP7
F16
E9
89
GP8
C15
E10
89
GP9/MRSTO#*
F15
K12
89
GP10
C14
C11
89
GP11
F14
C14
88
GP12
C13
D11
89
GP13
C12
E11
89
GP14
C11
A9
89
GP15
C10
B11
89
GP16
C9
B10
89
GP17
C8
C9
89
GP18
C7
D9
89
Table 25 : Pn6 GPIO Pin Map
*FPGA pins K10 and K12 can optionally drive MRSTO# and MBIST# on the XMC P5 connector. Please contact
Alpha Data for further details if this is required.
Page 29
Rear Connector Pinouts
ad-ug-1353_v1_7.pdf