
66
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30, 31
32, 33
34
35
FIN2
FIN1
E
F
TB
TE–
TE
TESI
SCI
TH
TA
TD–
TD
JP
TO
FD
FD–
FA
FA–
FE
FE–
AGND
NC
SP
SPG
SP–
SPD
SLEQ
SLD
SL–, SL+
JP–, JP+
TGL
TOFF
I
I
I
I
I
I
O
I
I
I
O
I
I
I
O
O
I
I
I
O
I
—
—
O
I
I
O
I
O
I
I
I
I
Pin to which external pickup photo diode is connected. RF signal is created by adding
with the FIN1 pin signal. FE signal is created by subtracting from the FIN1 pin signal.
Pin to which external pickup photo diode is connected.
Pin to which external pickup photo diode is connected. TE signal is created by
subtracting from the F pin signal.
Pin to which external pickup photo diode is connected.
DC component of the TE signal is input.
Pin to which external resistor setting the TE signal gain is connected between the TE pin.
TE signal output pin.
TES “Track Error Sense” comparator input pin. TE signal is passed through a band-
pass filter then input.
Shock detection signal input pin.
Tracking gain time constant setting pin.
TA amplifier output pin.
Pin to which external tracking phase compensation constants are connected between
the TD and VR pins.
Tracking phase compensation setting pin.
Tracking jump signal (kick pulse) amplitude setting pin.
Tracking control signal output pin.
Focusing control signal output pin.
Pin to which external focusing phase compensation constants are connected between
the FD and FA pins.
Pin to which external focusing phase compensation constants are connected between
the FD– and FA– pins.
Pin to which external focusing phase compensation constants are connected between
the FA and FE pins.
FE signal output pin.
Pin to which external FE signal gain setting resistor is connected between the FE pin.
Analog signal GND.
No connection.
Single ended output of the CV+ and CV– pin input signal.
Pin to which external spindle gain setting resistor in 12 cm mode is connected.
Pin to which external spindle phase compensation constants are connected together
with SPD pin.
Spindle control signal output pin.
Pin to which external sled phase compensation constants are connected.
Sled control signal output pin.
Sled advance signal input pin from microprocessor.
Tracking jump signal input pin from DSP.
Tracking gain control signal input from DSP. Low gain when TGL = H.
Tracking off control signal input pin from DSP. Off when TOFF = H.
IC, LA9241ML
Pin No.
Pin Name
I/O
Description
Summary of Contents for CSD-MD50
Page 16: ...18 17 FL 16 ST 32GNK GRID ASSIGNMENT ANODE CONNECTION...
Page 17: ...20 19 BLOCK DIAGRAM 1 MAIN...
Page 18: ...22 21 BLOCK DIAGRAM 2 SYSTEM CONTROL...
Page 19: ...24 23 BLOCK DIAGRAM 3 MD...
Page 20: ...1 2 3 4 5 6 7 8 9 10 11 12 13 14 A B C D E F G H I J K 26 25 WIRING 1 MAIN...
Page 21: ...28 27 SCHEMATIC DIAGRAM 1 TUNER...
Page 22: ...30 29 SCHEMATIC DIAGRAM 2 DECK...
Page 23: ...32 31 SCHEMATIC DIAGRAM 3 MAIN...
Page 24: ...1 2 3 4 5 6 7 8 9 10 11 12 13 14 A B C D E F G H I J K 34 33 WIRING 2 SYSTEM CONTROL CD...
Page 25: ...36 35 SCHEMATIC DIAGRAM 4 SYSTEM CONTROL...
Page 26: ...1 2 3 4 5 6 7 8 9 10 11 12 13 14 A B C D E F G H I J K 38 37 WIRING 3 FL KEY...
Page 27: ...40 39 SCHEMATIC DIAGRAM 5 CD...
Page 28: ...1 2 3 4 5 6 7 8 9 10 11 12 13 14 A B C D E F G H I J K 42 41 WIRING 4 POWER...
Page 29: ...44 43 SCHEMATIC DIAGRAM 6 FL KEY POWER...
Page 31: ...48 47 SCHEMATIC DIAGRAM 7 MD...
Page 54: ...72 IC BLOCK DIAGRAM IC BA5970FP IC BA6417F...
Page 55: ...73 IC BD7910FV IC BH3862FS...
Page 56: ...74 IC AK4519VF IC AK93C65AF...
Page 57: ...75 Rog CURRENT DETECTOR TERMINAL IC BA5936 IC LC75710NE...
Page 58: ...76 VSSX VSSD VDD VSSA IC TC74HCT7007AF IC LC72121...