
59
1
MNT0
O
Monitor output pin.
2
MNT1
O
Monitor output pin.
3
MNT2
O
Monitor output pin.
4
MNT3
O
Monitor output pin.
5
SWDT
I
Data input pin for micro-processor serial interface.
6
SCLK
I
Shift clock input pin for micro-processor serial interface.
7
XLAT
I
Latch input pin for micro-processor serial interface. Shut down: Latch.
8
SRDT
O
Data output pin for micro-processor serial interface.
9
SENS
O
Output internal status according to micro-processor serial interface address.
10
XRST
I
Reset input pin. "L": Reset.
11
SQSY
O
Disc sub-code Q synchronize / ADIP synchronize output.
12
DQSY
O
When source of the digital in is set to CD or MD, output sub-code Q synchronize of
UbitCD or MD format.
13
RECP
I
Laser power switching input pin. "H": Record power. 'L": Playback power.
14
XINT
O
Intrusion demand output pin. "L" setting when intrusion demand status is generated.
15
TX
I
Record data output enable signal input pin. "H": Enable.
16
OSCI
I
Crystal oscillator circuit input pin.
17
OSCO
O
Crystal oscillator circuit output pin. (OSCI inverted output)
18
XTSL
I
Switch input frequency of OSCI pin. (Connected to DVDD)
"H": 512Fs (22.5792MHz), "L": 1024Fs (45.158MHz).
19
NC
–
Not used. (Connected to DVDD)
20
DVSS
–
Digital GND.
21
DIN
I
Input digital audio interface signal.
22
DOUT
O
Output digital audio interface signal.
23
ADDT
I
Analog record input pin. (Connected to external A/D converter output)
24
DADT
O
REC monitor output pin / Output decode audio data.
25
LRCK
O
Output LRCK (44.1kHz) to external audio block.
26
XBCK
O
Output bit clock (2.8224MHz) to external audio block.
27
FS256
O
Output 256Fs (11.2896MHz).
28
DVDD
–
Digital power supply.
29
A03
O
Output address for external DRAM.
30
A02
O
Output address for external DRAM.
31
A01
O
Output address for external DRAM.
32
A00
O
Output address for external DRAM.
33
A10
O
Output address for external DRAM. (Not used)
34
A04
O
Output address for external DRAM.
35
A05
O
Output address for external DRAM.
36
A06
O
Output address for external DRAM.
37
A07
O
Output address for external DRAM.
38
A08
O
Output address for external DRAM.
39
A11
O
Output address for external DRAM. (Not used.)
Pin No.
Pin Name
I/O
Description
IC, CXD2652AR
IC DESCRIPTION
Summary of Contents for CSD-MD50
Page 16: ...18 17 FL 16 ST 32GNK GRID ASSIGNMENT ANODE CONNECTION...
Page 17: ...20 19 BLOCK DIAGRAM 1 MAIN...
Page 18: ...22 21 BLOCK DIAGRAM 2 SYSTEM CONTROL...
Page 19: ...24 23 BLOCK DIAGRAM 3 MD...
Page 20: ...1 2 3 4 5 6 7 8 9 10 11 12 13 14 A B C D E F G H I J K 26 25 WIRING 1 MAIN...
Page 21: ...28 27 SCHEMATIC DIAGRAM 1 TUNER...
Page 22: ...30 29 SCHEMATIC DIAGRAM 2 DECK...
Page 23: ...32 31 SCHEMATIC DIAGRAM 3 MAIN...
Page 24: ...1 2 3 4 5 6 7 8 9 10 11 12 13 14 A B C D E F G H I J K 34 33 WIRING 2 SYSTEM CONTROL CD...
Page 25: ...36 35 SCHEMATIC DIAGRAM 4 SYSTEM CONTROL...
Page 26: ...1 2 3 4 5 6 7 8 9 10 11 12 13 14 A B C D E F G H I J K 38 37 WIRING 3 FL KEY...
Page 27: ...40 39 SCHEMATIC DIAGRAM 5 CD...
Page 28: ...1 2 3 4 5 6 7 8 9 10 11 12 13 14 A B C D E F G H I J K 42 41 WIRING 4 POWER...
Page 29: ...44 43 SCHEMATIC DIAGRAM 6 FL KEY POWER...
Page 31: ...48 47 SCHEMATIC DIAGRAM 7 MD...
Page 54: ...72 IC BLOCK DIAGRAM IC BA5970FP IC BA6417F...
Page 55: ...73 IC BD7910FV IC BH3862FS...
Page 56: ...74 IC AK4519VF IC AK93C65AF...
Page 57: ...75 Rog CURRENT DETECTOR TERMINAL IC BA5936 IC LC75710NE...
Page 58: ...76 VSSX VSSD VDD VSSA IC TC74HCT7007AF IC LC72121...