Aim AXC-FDX-2, Hardware Manual

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4 . Technical Data
AXC-FDX-2 Hardware Manual 17
4
TECHNICAL DATA
PCI Express bus: Compatible with PCI-Express Standard (Release 2.0)
1-Lane Interface
Up to 500 Mbyte/s Bandwidth in each direction concurrently
(up/downstream)
Memory : 1024 MByte DDR3-RAM (Global RAM)
2048 MByte DDR3-RAM (Dedicated RX-RAM)
32 MByte SPI-Flash for SoC
8 Kbit EEPROM for NOVRAM
2 Kbit EEPROM for XMC Configuration Data
Processor: Dual Core Cortex® A9 with a core speed of up to 800 MHz
AFDX-Encoder
: Two AFDX-Encoders with error injection
Data rate of 10/100/1000 Mbit per second
Interframe Gap timer with 8ns resolution at 1000Mbit
40ns resolution at 100Mbit
400ns resolution at 10Mbit
Error injection:
CRC Error
Unaligned Byte (only 10/100Mbit)
Short Frame Error
Long Frame Error
Physical bus errors (invalid Symbol)
AFDX MAC Frame Error
AFDX IP Header Error
AFDX-Decoder : Two AFDX-Decoders with time stamp and error detection
Data rate of 10/100/1000 Mbit per second
Time stamp for received frames
Frame length statistic
Error Detection:
CRC Error
Unaligned Byte (only 10/100Mbit)
Physical bus errors (invalid Symbol)
Short Frame Error
Long Frame Error
AFDX MAC Frame Error
AFDX IP Header Error