DM482e User Manual
AEMULUS
29
RFFE bus components are connected in parallel to the SCLK and SDATA lines of the bus. Line
drivers always exist for both SCLK and SDATA in the master, whereas only slaves supporting
read-back functionality need a line driver for SDATA. Each physical slave must have one SCLK
input pin, one SDATA input or bidirectional pin, and a VIO pin to ensure signal compatibility
between devices. Note that VIO can be supplied externally or it may be sourced from the
master device.