Advantech SOM-5991, User Manual

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SOM-5991 User Manual 52
 CECC WA Control
This knob controls the CECC WA. Disabled by Default on L0 and later proces-
sor.
 CAP ERR FLOW feature Control
This knob controls the CAP ERR FLOW feature. Disabled by Default.
 Scrambling Seed Low
Low 43 bits of the scrambling seed.
 Scrambling Seed High
Low 32 bits of the scrambling seed.
 Enable ADR
Enables the detecting and enabling of ADR.
 MC BGF threshold
The HA to MC BGF threshold is used for scheduling MC request in bypass con-
dition.
 DLL Reset Test
Set this to the number of loops to execute the DDL reset test.
 MC ODT Mode
Select MC ODT Mode.
 Opp read during WMM
Enable or Disable issuing read commands opportunistically during WMM.
 Normal Operation Duration
Set normal operation duration interval (0 - 65535).
 Number of Sparing Transaction
Set number of sparing transactions interval (0 - 65535).
 PSMI Support
PSMI Supports Disable or Enable.
 C/A Parity Enable
Enable or Disable DDR4 Command Address Parity.
 SMB Clock Frequency
Sets DDR4 SMB Clock Frequency for SPD Access.
 DIMM Rank Enable Mask
Select ranks to enable or disable per DIMM.