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SOM-5991 User Manual

98

A87

RSVD

B87

VCC_5V_SBY

A88

PCIE_

B88

BIOS_DIS1#

A89

PCIE_CLK_REF-

B89

SOM-5991 NC

A90

GND

B90

GND

A91

SPI_POWER

B91

SOM-5991 NC

A92

SPI_MISO

B92

SOM-5991 NC

A93

GPO0

B93

SOM-5991 NC

A94

SPI_CLK

B94

SOM-5991 NC

A95

SPI_MOSI

B95

SOM-5991 NC

A96

TPM_PP

B96

SOM-5991 NC

A97

TYPE10#

B97

SPI_CS#

A98

SER0_TX

B98

RSVD

A99

SER0_RX

B99

RSVD

A100

GND

B100

GND

A101

SER1_TX

B101

FAN_PWMOUT

A102

SER1_RX

B102

FAN_TACHIN

A103

LID#

B103

SLEEP#

A104

VCC_12V

B104

VCC_12V

A105

VCC_12V

B105

VCC_12V

A106

VCC_12V

B106

VCC_12V

A107

VCC_12V

B107

VCC_12V

A108

VCC_12V

B108

VCC_12V

A109

VCC_12V

B109

VCC_12V

A110

GND

B110

GND

SOM-5991 Row C,D

C1

GND

D1

GND

C2

GND

D2

GND

C3

USB_SSRX0-

D3

USB_SSTX0-

C4

US

D4

US

C5

GND

D5

GND

C6

USB_SSRX1-

D6

USB_SSTX1-

C7

US

D7

US

C8

GND

D8

GND

C9

USB_SSRX2-

D9

USB_SSTX2-

C10

US

D10

US

C11

GND

D11

GND

C12

USB_SSRX3-

D12

USB_SSTX3-

C13

US

D13

US

C14

GND

D14

GND

C15

LAN_MDC

D15

SOM-5991 NC

C16

LAM_MDIO

D16

SOM-5991 NC

C17

RSVD

D17

RSVD

C18

RSVD

D18

RSVD

C19

P

D19

P

C20

PCIE_RX6-

D20

PCIE_TX6-

C21

GND

D21

GND

C22

P

D22

P

C23

PCIE_RX7-

D23

PCIE_TX7-

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Summary of Contents for SOM-5991

Page 1: ...User Manual SOM 5991...

Page 2: ...n Advantech assumes no liability under the terms of this warranty as a consequence of such events Because of Advantech s high quality control standards and rigorous testing most of our customers never...

Page 3: ...f and on the user is encouraged to try to correct the interference by one or more of the following measures Reorient or relocate the receiving antenna Increase the separation between the equipment and...

Page 4: ...t must be located near the equip ment and must be easily accessible 5 Keep this equipment away from humidity 6 Put this equipment on a reliable surface during installation Dropping it or letting it fa...

Page 5: ...as been exposed to moisture The equipment does not work well or you cannot get it to work according to the user s manual The equipment has been dropped and damaged The equipment has obvious signs of b...

Page 6: ...mage To avoid electrical shock always disconnect the power from your PC chassis before you work on it Don t touch any components on the CPU card or other cards while the PC is on Disconnect power befo...

Page 7: ...awing 17 2 4 Assembly Drawing 17 Figure 2 7 Main Chip Height and Tolerance 17 Chapter 3 AMI BIOS 19 3 1 Introduction 20 Figure 3 1 Setup program initial screen 20 3 2 Entering Setup 21 3 2 1 Main Setu...

Page 8: ...eD02F2 Port 2C 63 Figure 3 42Socket 0 PcieD03F0 Port 3A 64 Figure 3 43IOAT Configuration 65 Figure 3 44IIO General Configuration 66 Figure 3 45Intel VT for Directed I O VT d 67 Figure 3 46IIO South Co...

Page 9: ...n Assignment 96 Appendix B Watchdog Timer 101 B 1 Programming the Watchdog Timer 102 Appendix C Programming GPIO 103 C 1 GPIO Register 104 Appendix D System Assignments 105 D 1 System I O Ports 106 Ta...

Page 10: ...SOM 5991 User Manual x...

Page 11: ...Chapter 1 1 General Information This chapter gives background information on the SOM 5991 CPU Computer on Module Sections include Introduction Functional Block Diagram Product Specification...

Page 12: ...ion demands in the area of COM Express Customers can take advantage of SOM 5991 s native 10GBase KR interfaces to design in 10GbE carrier boards SOM 5991 and its development board are ready for custom...

Page 13: ...r storage area GPIO GbE Gigabit Ethernet GPIO General purpose input output HDA Intel High Definition Audio HD Audio refers to the specification released by Intel in 2004 for delivering high definition...

Page 14: ...SOM 5991 User Manual 4 1 2 Functional Block Diagram...

Page 15: ...on SER1 1 0 0 I O A B LAN Port 0 Gigabit Ethernet 1 1 1 A B SATA 4 1 4 A B USB2 0 8 4 4 A B USB Client 1 0 0 A B HD Audio 1 0 0 A B SPI Bus 2 1 1 A B General Purpose I O GPIO 8 8 8 A B SDIO muxed on G...

Page 16: ...2 x8 1 x8 2 x4 or 4 x4 1 3 6 2 PCIe x1 Intel Xeon Processor D natively integrates 8 PCI Express x1 lanes and up to 8 devices which support up to Gen2 5 0 Gb s SOM 5991 supports 8 PCIe x1 by default a...

Page 17: ...ti level watchdog time out output Provides 1 65535 level from 100ms to 109 22 minutes interval Serial port 2 ports 2 wire serial port Tx Rx supports 16550 UART compliance Programmable FIFO or characte...

Page 18: ...S4 S5 USB Wake Wake to S0 from S3 S4 PCIe Device Wake depends on user inquiry and may need customized BIOS LPC Wake depends on user inquiry and may need customized BIOS Advantech S5 ECO Mode Deep Slee...

Page 19: ...ission of Advantech Embedded Software Services is to Enhance quality of life with Advantech platforms and Microsoft Windows embedded technology We enable Windows Embedded software products on Advantec...

Page 20: ...se refer to Advantech COM Performance Power Consumption Table 1 3 6 13 Selection Guide w P N 1 3 6 14 Packing list 1 3 6 15 Development Board 1 3 6 16 Optional Accessory Power Consumption Table Watt V...

Page 21: ...operties and how to connect for different user scenes In layout checklist it will specify the layout con strains and recommendations for trace length impedance and other necessary infor mation during...

Page 22: ...SOM 5991 User Manual 12...

Page 23: ...Chapter 2 2 Mechanical Information This chapter gives mechanical information on the SOM 5991 CPU Computer on Module Sections include Board Information Mechanical Drawing Assembly Drawing...

Page 24: ...ese positions while designing the customer s own carrier board to avoid mechanical problems and thermal solutions contacts for best thermal dispas sion performance Figure 2 1 Board chips identify Fron...

Page 25: ...models please find on Advantech COM support service website http com advantech com Figure 2 3 Board Mechanical Drawing Front Table 2 1 FAN1 Fan FAN1 Fan Description Wafer 2 0mm 3P 90D M DIP 2001 WR 0...

Page 26: ...SOM 5991 User Manual 16 Figure 2 4 Board Mechanical Drawing Back Figure 2 5 Board Mechanical Drawing Side 0 4 116 2 121 0 77 1 89 1 10 2 16 5 74 2 114 8 12 6 81 4 R2 2 7 6 5 7 4 2 1 Rear side height...

Page 27: ...screw holes for SOM 5991 to be pre assembled with heat spreader 2 4 Assembly Drawing Please consider the CPU and chip height tolerance when designing your thermal solution 2 8 Core F5 NOM 3 556mm TOL...

Page 28: ...SOM 5991 User Manual 18...

Page 29: ...Chapter 3 3 AMI BIOS This chapter gives BIOS setup information for the SOM 5991 CPU computer on module Sections include Introduction Entering Setup Hot Operation Key Exit BIOS Setup Utility...

Page 30: ...m features This chapter describes the basic navigation of the BIOS Setup Util ity Figure 3 1 Setup program initial screen AMI s BIOS ROM has a built in Setup program that allows users to modify the ba...

Page 31: ...has two main frames The left frame displays all the options that can be configured Grayed out options cannot be configured options in blue can The right frame displays the key legend Above the key leg...

Page 32: ...e left frame of the screen such as CPU Configuration to go to the sub menu for that item Users can display an Advanced BIOS Setup option by highlighting it using the Arrow keys All Advanced BIOS Setup...

Page 33: ...or Disables BIOS support for security device OS will not show security Device TCG EFI protocol and INT1A interface will not be available Device Select Select the device TPM 2 0 will restrict support...

Page 34: ...PI Auto Configuration Enable Hibernation Enables or Disables System ability to Hibernate OS S4 Sleep State This option may be not effective with some OS ACPI Sleep State Select the highest ACPI sleep...

Page 35: ...r Smart FAN Carrier Board function Backlight Enable Polarity Switch Backlight Enable Polarity for Native or Invert Brightness PWM Polarity Switch Backlight Control Brightness PWM Polarity for Native o...

Page 36: ...SOM 5991 User Manual 26 Serial Port 1 Configuration Figure 3 7 Serial Port 1 Configuration Serial Port Enable or Disable Serial Port COM Change Settings Select an optimal setting for Super IO device...

Page 37: ...91 User Manual Chapter 3 AMI BIOS Serial Port 2 Configuration Figure 3 8 Serial Port 2 Configuration Serial Port Enable or Disable Serial Port COM Change Settings Select an optimal setting for Super I...

Page 38: ...SOM 5991 User Manual 28 Hardware Monitor Figure 3 9 Hardware Monitor Hardware Monitor Information This item shows hardware information parameters...

Page 39: ...Redirection Enable or Disable COM2 Console Redirection Console Redirection Enable or Disable COM3 Console Redirection Console Redirection Enable or Disable COM4 Console Redirection Console Redirectio...

Page 40: ...le or Disable VGA Palette Snoop PERR Generation Enable or Disable PERR Generation SERR Generation Enable or Disable SERR Generation Above 4G Decoding Enable or Disable Above 4G Decoding Don t Reset VC...

Page 41: ...twork Stack Configuration Figure 3 12 Network Stack Configurations Network Stack Enable or Disable Network Stack Ipc4 PXE Support Enable or Disable Ipc4 PXE support Ipv6 PXE Support Enable or Disable...

Page 42: ...ap Response this option is useful when any RT code is exe cuted above 1MB Boot option filter This option controls Legacy UEFI ROMs priority Network Controls the execution of UEFI and Legacy PXE OpROM...

Page 43: ...33 SOM 5991 User Manual Chapter 3 AMI BIOS 3 2 2 8 NVMe Configuration Figure 3 14 NVMe Configuration NVMe Device Options Setting User can adjsut the setting after inserting the NVMe device...

Page 44: ...should be claimed by EHCI driver USB Mass Storage Driver Support Enable or Disable USB Mass Storage Driver Support Port 60 64 Emulation Enable I O port 60h 64h emulation support This should be enabled...

Page 45: ...as CDROM drives with no media will be emulated according to a drive type AMI Virtual CDROMO 1 00 Select the device emulation type as Auto Floppy Forced FDD Hard Disk or CD ROM AMI Virtual Floppy0 1 00...

Page 46: ...Power Management Configuration Displays and provides options to change the Power Management Settings Common RefCode Configuration Displays and provides options to change the Common RefCode Settings Me...

Page 47: ...37 SOM 5991 User Manual Chapter 3 AMI BIOS 3 2 3 1 Processor Configuration Figure 3 17 Processor Configuration 1 Figure 3 18 Processor Configuration 2...

Page 48: ...lock bits PPIN Control Unlock and Enable Disable PPIN Control Debug Interface MSR 0C80h bit 0 When set enables te debug features Hardware Prefetcher MLC Streamer Prefectcher MSR 1A4h Bit 0 Adjacent Ca...

Page 49: ...EDT only select whether VR power is turned off to empty DIMM chan nels UFS Setting in PCU_MISC_CONFIG Bit 28 CPU PM Tuning It selected as AUTO all bit in MSR 1FCh keeping value as P0 EIST P states Whe...

Page 50: ...C_CONFIG Bit 30 SPD PL2_SAFETY_NET_ENABLE PCU_MISC_CONFIG Bit 1 PL _SAFETY_NET_ENABLE Energy efficient P state Enable Disable Energy efficient P state feature When set to 0 will disable access to ENER...

Page 51: ...41 SOM 5991 User Manual Chapter 3 AMI BIOS XE Ratio Limit Figure 3 21 XE Ratio Limit Overclocking Lock Enable Disable Overclocking...

Page 52: ...CPU takes effect after reboot Package C state limit Press enter to select C State limit option CPU C3 report Enable Disable CPU C3 ACPI C2 report to OS Recommended to be disabled CPU C6 report Enable...

Page 53: ...43 SOM 5991 User Manual Chapter 3 AMI BIOS CPU T State Control Figure 3 23 CPU T State Control ACPI T States Enable or Disable CPU throttling by OS Throttling reduces power consumption...

Page 54: ...tle the processor Thermal Monitor Enable or Disable Thermal Monitor PROCHOT PREPONSE Force CPU to throttle to a lower power condition such as Pn Pm by asserting PROCHOT MSR 0xaFC 26 1 go to Pm min fr...

Page 55: ...s to the CPU for better performance or power savings Program PowerCTL_MSR Program PowerCTL MSR 0x1FC Sub Menu Program PRO_CURT_CFG_CTRL_MSR Program PRI_PLANE_CURT_CFG_CTRL_MSR 0x601 Sub Menu Program C...

Page 56: ...ion Figure 3 26 DRAM RAPL Configuration DRAM RAPL Baseline DRAM RAPL Baseline enabled and baseline mode Override BW_LIMIT_TF Allows custom tuning of BW_LIMIT_TF when DRAM RAPL is enabled DRAM RAPL Ext...

Page 57: ...Turbo Mode Long Duration Power Limit aka Power Limit 1 in Watts The value may vary from 0 to Fused Values Long Dur Time Window Long Duration Time Window aka Power Limit 1 Time value in seconds The val...

Page 58: ...fCode Configuration Figure 3 28 Common RefCode Configuration MMCFG Base Select MMCFG Base MMIOBase MMIOH Base 63 32 must be between 4032 4078 MMIO High Size Select MMIO High Size Isoc Mode IsocL Disab...

Page 59: ...ns in Mhz Do not select reserved MRC Promote Warnings Determines if MRV warnings are promoted to system level 1 Promote Warnings Determines if warnings are promoted to system level 1 Halt on mem Train...

Page 60: ...ble memory test during normal boot MemTestLoops Number of memory test loops during normal boot set to 0 to run memtest infi nitely Dram Maintenance Test Dram Maintenance Test during normal boot Memory...

Page 61: ...le to increase boot speed Attempt Fast Cold Boot When enabled portions of memory reference code will be skipped when possi ble to increase boot speed MemTest On Fast Boot Enable or disable memory test...

Page 62: ...cheduling MC request in bypass con dition DLL Reset Test Set this to the number of loops to execute the DDL reset test MC ODT Mode Select MC ODT Mode Opp read during WMM Enable or Disable issuing read...

Page 63: ...53 SOM 5991 User Manual Chapter 3 AMI BIOS Memory Topology Figure 3 31 Memory Topology Display memory topology with DIMM population information...

Page 64: ...g SSR4 VR Static Phase Shedding Support Memory Power Saving Mode Configures CKE and related Memory Power Saving Features Memory Power Savings Advanced Options MDLL Off Enable to shut down MDLL during...

Page 65: ...55 SOM 5991 User Manual Chapter 3 AMI BIOS Memory Power Savings Advanced Options Figure 3 33 Memory Power Savings Advanced Options Allow user to configure CK behavior during self refresh...

Page 66: ...r Manual 56 Memory Timings Voltage Override Figure 3 34 Memory Timings Voltage Override DIMM profile Select the XMP profile to use Memory Frequency Maximum memory frequency selection in Mhz Do not sel...

Page 67: ...the 0 4GB address space between two sockets so that both sockets get a chunk of local memory below 4GB Channel Interleaving Select Channel Interleaving setting Rank Interleaving Select Rank Interleavi...

Page 68: ...SOM 5991 User Manual 58 Memory RAS Configuration Figure 3 36 Memory RAS Configuration Display and provide option to change the memory Ras Settings...

Page 69: ...VCP Disable PCH VC1 set IIO CV1 PCH VCP to TC2 clear irp_misc_dfx0 force_no_snp_on_vc1_vcm DMI Vc1 Control Enable or Disable DMI Vc1 DMI Vcp Control Enable or Disable DMI Vcp DMI Vcm Control Enable o...

Page 70: ...OU2 IIO PCIe Port 1 Select PCIe port Bifurcation for selected slot s Options x4x4 x8 Auto IOU1 IIO PCIe Port 2 Select PCIe port Bifurcation for selected slot s Options x4x4x4x4 x4x4x8 x8x4x4 x8x8 x16...

Page 71: ...t 1B Intel i210 Giga Lan Figure 3 39 Socket 0 PcieD01F1 Port 1B Intel i210 Giga Lan In auto mode the BIOS will remove the EXP port if there is no device or errors on that device or device is not HP ca...

Page 72: ...ieD01F2 Port 2A Figure 3 40 Socket 0 PcieD01F2 Port 2A In auto mode the BIOS will remove the EXP port if there is no device or errors on that device or device is not HP capable Disable is used to disa...

Page 73: ...cket 0 PcieD02F2 Port 2C Figure 3 41 Socket 0 PcieD02F2 Port 2C In auto mode the BIOS will remove the EXP port if there is no device or errors on that device or device is not HP capable Disable is use...

Page 74: ...ieD03F0 Port 3A Figure 3 42 Socket 0 PcieD03F0 Port 3A In auto mode the BIOS will remove the EXP port if there is no device or errors on that device or device is not HP capable Disable is used to disa...

Page 75: ...al Chapter 3 AMI BIOS IOAT Configuration Figure 3 43 IOAT Configuration Enable IOAT Control to enable ot disable IIOAT devices No Snoop No Snoop enable or disable for each CB device Disable TPH TLP Pr...

Page 76: ...5991 User Manual 66 IIO General Configuration Figure 3 44 IIO General Configuration TXT DPR memory setting Allows selection of the TXT DPR size in system IIO 0 IIO IOAPIC Enable or Disable the IIO IOA...

Page 77: ...ion Technology for Directed I O VT d by reporting the I O device assignment to VMM through DMAR ACPI Tables ACS Control Enable Programs ACS only to Chipset PCIe Root Ports Bridges Disable Programs ACS...

Page 78: ...al 68 IIO South Complex Configuration Figure 3 46 IIO South Complex Configuration SC GbE PF0 10GbE Force Enable or Disable SC GbE physical function 0 SC GbE PF1 10GbE Force Enable or Disable SC GbE ph...

Page 79: ...69 SOM 5991 User Manual Chapter 3 AMI BIOS 3 2 3 6 PCH Configuration Figure 3 47 PCH Configuration...

Page 80: ...PCH Server Error Reporting Mode SERM When enable MCH is final target of all final target to all erroes PCH Display Enable or Disable PCH Display Serial IRQ Mode Configure Serial IRQ Mode High Precisi...

Page 81: ...nfiguration Figure 3 49 PCH Express Configuration PCIe USB Glitch W A PCIe USB Glitch W A for bad USB device s connected behind PCIE PEG Port PCI Express Root Port 0 7 Select one of the PCI Express Ro...

Page 82: ...M 5991 User Manual 72 PCH SATA Configuration Figure 3 50 PCH SATA Configuration Press enter into each option to select SATA devices and settings Select configuration SATA as AHCI or IDE default by AHC...

Page 83: ...or faster enumeration xHCI Mode Mode of operation of xHCI controller Trunk Clock Gating BTCG Enable or Disable BTCG USB Ports Per Port Disable Control Control each of the USB ports 0 13 disabling xHCI...

Page 84: ...or Disable the PCH GPIO Lockdown feature RTC Lock Enable will lock bytes 38h 3Fh in the lower upper 128 byte bank of RTC RAM BIOS Lock Enable or Disable the PCH BIOS Lock Enable Feature Host Flash Loc...

Page 85: ...AMI BIOS Azalia Configuration Figure 3 53 Azalia Configuration Control Detection of the Azalia device Auto Azalia will be enabled if present disabled otherwise Disabled Azalia will be unconditionally...

Page 86: ...SOM 5991 User Manual 76 3 2 3 7 Miscellaneous Configuration Figure 3 54 Miscellaneous Configuration Fan PWN Offset Specify fan speed offset PCIe Max Read Request Size Set Max Read Request Size...

Page 87: ...ude The altitude of the platform location above the see level expressed in meters The hex number is decoded as 2 s complement signed integer Provide the 80000000 value if the altitude is unknown MCTP...

Page 88: ...runtime error log configuration System Errors System Error enabling and logging setup option S W Error Injection Support When Enable S W Error Injection is supported by unlocking MSR 0x790 Clear McBan...

Page 89: ...991 User Manual Chapter 3 AMI BIOS 3 2 3 10 Reserve Memory Figure 3 57 Reserve Memory Reserve Memory Range Sets aside an empty memory page that is hidden from the OS Reserve TAGEC Memory Reserve 16M f...

Page 90: ...S starts during AC power on It takes around 30 seconds to initialize Host to BMC interfaces FRB 2 Timer Enable or Disable FRB 2 timer POST timer FRB 2 Timer Timeout Enter value between 3 to 6 min for...

Page 91: ...59 System Event Log SEL Components Change this to enable or disable all features of System Event Logging during boot Erase SEL Choose options for erasing SEL When SEL is Full Choose options for reacti...

Page 92: ...3 2 4 2 BMC self test log Logs the report returned by BMC self test command Figure 3 60 BMC self test log Erase Log Choose Yes or No to erase log on every reset When log is full Select the action to b...

Page 93: ...Check configuration BMC network parameters Figure 3 61 BMC network configuration Configuration Address source Select to configure LAN channel parameters statically or dynamically by BIOS or BMC Unspe...

Page 94: ...SOM 5991 User Manual 84 3 2 4 4 View System configuration Press Enter to view the system configuration status You need to wait some time for system reaction Figure 3 62 View System configuration...

Page 95: ...85 SOM 5991 User Manual Chapter 3 AMI BIOS 3 2 4 5 BMC User Settings Press Enter to select the BMC user setting in this page to add or delete user infor mation Figure 3 63 BMC User Settings...

Page 96: ...row keys All Plug and Play BIOS Setup options are described in this section The Plug and Play BIOS Setup screen is shown below Figure 3 64 Security Administration Password Press enter and the user is...

Page 97: ...t using by the Arrow keys Figure 3 65 Boot Setup Prompt Timeout Number of seconds to wait for setup activation key 65535 0xFFFF means indefinite waiting Bootup Numlock State Select the keyboard Numloc...

Page 98: ...screen to enter the BIOS Setup screen You can select the items by highlighting it using by the Arrow keys Figure 3 66 Event Logs Change Smbios Event Log Settings Press enter to change the smbios event...

Page 99: ...stem configuration Save Changes and Reset When users have completed system configuration select this option to save changes exit BIOS setup menu and reboot the computer to take effect all sys tem conf...

Page 100: ...ormance but may not work best for all computer applications In partic ular do not use the Optimal Defaults if the user s computer is experiencing system configuration problems Save as User Defaults Wh...

Page 101: ...Chapter 4 4 S W Introduction Installation S W Introduction Driver Installation Advantech iManager...

Page 102: ...OS To install the drivers for Linux or other OS please connect to internet and browse the browse the website http support advantech com tw to download the setup file 4 3 Advantech iManager Advantech...

Page 103: ...rs for low speed system management communications The SMBus API allows a developer to interface a embedded sys tem environment and transfer serial messages using the SMBus protocols allowing multiple...

Page 104: ...API that inspects certain condition indexes such as fan speed temperature and voltage Hardware Control The Hardware control API allows developers to set the PWM Pulse Width Modulation value to adjust...

Page 105: ...Appendix A A Pin Assignment This appendix gives you the infor mation about the hardware pin assignment of the SOM 5991 CPU System on Module Sections include SOM 5991 Type 6 Pin Assign ment...

Page 106: ...LPC_AD2 A7 GBE0_MDI2 B7 LPC_AD3 A8 GBE0_LINK B8 LPC_DRQ0 A9 GBE0_MDI1 B9 LPC_DRQ1 A10 GBE0_MDI1 B10 LPC_CLK A11 GND B11 GND A12 GBE0_MDI0 B12 PWRBTN A13 GBE0_MDI0 B13 SMB_CK A14 SOM 5991 NC B14 SMB_DA...

Page 107: ...PCIE_RX3 A60 GND B60 GND A61 PCIE_TX2 B61 PCIE_RX2 A62 PCIE_TX2 B62 PCIE_RX2 A63 GPI1 B63 GPO3 A64 PCIE_TX1 B64 PCIE_RX1 A65 PCIE_TX1 B65 PCIE_RX1 A66 GND B66 WAKE0 A67 GPI2 B67 WAKE1 A68 PCIE_TX0 B68...

Page 108: ...A105 VCC_12V B105 VCC_12V A106 VCC_12V B106 VCC_12V A107 VCC_12V B107 VCC_12V A108 VCC_12V B108 VCC_12V A109 VCC_12V B109 VCC_12V A110 GND B110 GND SOM 5991 Row C D C1 GND D1 GND C2 GND D2 GND C3 USB...

Page 109: ...ND D41 GND C42 LAN0_PORT1_SDP0 D42 LAN0_PORT1_I2C_CLK C43 SOM 5991 NC D43 LAN0_PORT1_I2C_DATA C44 LAN1_PORT1_LED1 D44 LAN0_PORT1_LED0 C45 RSVD D45 RSVD C46 SOM 5991 NC D46 SOM 5991 NC C47 SOM 5991 NC...

Page 110: ...D87 GND C88 PEG_RX11 D88 PEG_TX11 C89 PEG_RX11 D89 PEG_TX11 C90 GND D90 GND C91 PEG_RX12 D91 PEG_TX12 C92 PEG_RX12 D92 PEG_TX12 C93 GND D93 GND C94 PEG_RX13 D94 PEG_TX13 C95 PEG_RX13 D95 PEG_TX13 C96...

Page 111: ...Appendix B B Watchdog Timer This appendix gives you the infor mation about the watchdog timer programming on the SOM 5991 CPU System on Module Sections include Watchdog Timer Programming...

Page 112: ...nd then set to EC Only Win8 1 and Win10 support it In other OS it will still use IRQ number from BIOS setting as usual For details please refer to iManager Software API User Manual Trigger Event Note...

Page 113: ...Appendix C C Programming GPIO This Appendix gives the illustra tion of the General Purpose Input and Output pin setting Sections include System I O ports...

Page 114: ...User Manual 104 C 1 GPIO Register For details please refer to iManager Software API User Manual GPIO Byte Mapping H W Pin Name BIT0 GPO0 BIT1 GPO1 BIT2 GPO2 BIT3 GPO3 BIT4 GPI0 BIT5 GPI1 BIT6 GPI2 BI...

Page 115: ...signments This appendix gives you the infor mation about the system resource allocation on the SOM 5991 CPU System on Module Sections include System I O ports DMA Channel Assignments Interrupt Assignm...

Page 116: ...therboard resources 0092 0092 Motherboard resources 00C0 00DF Direct memory access controller 0020 003D Programmable interrupt controller 00A0 00BD Programmable interrupt controller 00F0 00F0 Numeric...

Page 117: ...A AHCI Controller IRQ 16 Intel R 8 Series C220 Series PCI Express Root Port 1 8C10 RQ 18 Intel R 8 Series C220 Series USB EHCI 1 8C26 IRQ 19 Intel R 8 Series C220 Series PCI Express Root Port 8 8C1E I...

Page 118: ...FFFFF Intel R Xeon R E7 v4 Xeon R E5 v4 Xeon R E3 v4 Xeon R D PCI Express Root Port 2 6F04 0xF8000000 0xF801FFFF ASPEED Graphics Family WDDM 0xF8613000 0xF86133FF Intel R 8 Series C220 Series USB EHCI...

Page 119: ...0xFED1200F Motherboard resources 0xFED12010 0xFED1201F Motherboard resources 0xFED1B000 0xFED1BFFF Motherboard resources 0xF8600000 0xF860FFFF Intel R USB 3 0 eXtensible Host Controller 0100 Microsof...

Page 120: ...tions are subject to change without notice No part of this publication may be reproduced in any form or by any means electronic photocopying recording or otherwise without prior written permis sion of...

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