Advantech SOM-5991, User Manual

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SOM-5991 User Manual 42
CPU C State Control
Figure 3.22 CPU C State Control
 C2C3TT
Default = 0, means [AUTO].
C2 to C3 Transition Timer, PPDN_INIT = 1:10:1:74 Bit [11:0].
 CPU C State
Enable or Disable the Enhanced Cx state of the CPU, takes effect after reboot.
 Package C state limit
Press enter to select C State limit option.
 CPU C3 report
Enable/Disable CPU C3(ACPI C2) report to OS. Recommended to be disabled.
 CPU C6 report
Enable/Disable CPU C6(ACPI C2) report to OS. Recommended to be disabled.
 Enhances Halt State (C1E)
Enable or Disable the Enhanced C1E state of the CPU, takes effect after reboot.
 OS ACPI Cx
Report CC3/CC6 to OS ACPI C2 or ACPI C3.