Advantech PCIE-1816, User Manual, Page: 56 / 62

PCIE-1816_1816H User Manual 50
B.2.3 AO Clock Sources
The PCIE-1816/1816H can adopt both internal and external clock sources for pacing
the analog output of each channel:
 Internal AO output clock with 32-bit Divider
 External AO output clock from connector
The internal and external AO output clocks are described in more detail as follows:
 Internal AO Output Clock
The internal AO output clock applies a 100 MHz time base divided by a 32-bit coun-
ter. Conversions start on the rising edges of counter output. Through software, user
can specify the clock source and clock frequency to pace the analog output opera-
tion. The maximum frequency is 3 MS/s.
 External AO Output Clock
The external AO output clock is useful when you want to pace analog output opera-
tions at rates not available with the internal AO output clock, or when you want to
pace at uneven intervals. Connect an external AO output clock to the pin and then
the conversions will start on input signal’s rising edge. You can use software to spec-
ify the clock source as external. The maximum input clock frequency is 3 MS/s.
B.2.4 AO Trigger Sources
The PCIE-1816/1816H supports External digital (TTL) trigger to activate AO conver-
sions for waveform mode. An external digital trigger event occurs when the PCIE-
1816/1816H detects either a rising or falling edge on the External AO TTL trigger
input signal from the pin of connector. User can define the type of trigger source as
rising-edge or falling-edge by software. The trigger signal is TTL-compatible.
Table B.4: Analog Output Data Format
AO Code Mapping Voltage
Hex. Dec. Unipolar Bipolar
0000 h 0 d 0 - FS/2
7FFF h 32767 d FS/2 - 1 LSB - 1LSB
8000 h 32768 d FS/2 0
FFFF h 65535 d FS - 1 LSB FS/2 - 1 LSB
1 LSB FS/65536 FS/65536
Table B.5: Full Scale Values for Output Voltage Ranges
Reference
Source
Unipolar Bipolar
Range FS Range FS
Internal
0 ~ 5 V 5 ± 5 V 10
20
0 ~ 10 V 10 ± 10 V
External 0 ~ x V x ± x V 2x