Advantech PCIE-1805, User Manual

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PCIE-1805 User Manual 34
B.1.5 AI Trigger Source
The PCIE-1805 supports the following trigger sources for start, delay to start, delay to
stop, stop trigger acquisition modes:
 External digital (TTL) trigger
 Analog threshold trigger
With PCIE-1805, user can also define the type of trigger source as rising-edge or fall-
ing-edge. These following sections describe these trigger sources in more detail.
 External Digital (TTL) Trigger
For analog input operations, an external digital trigger event occurs when the PCIE-
1805 detects either a rising or falling edge on the External AI TTL trigger input. The
trigger signal is TTL compatible.
 Analog Threshold Trigger
For analog input operations, an analog trigger event occurs when the PCIE-1805
detects a transition from above a threshold level to below a threshold level (falling
edge), or a transition from below a threshold level to above a threshold level (rising
edge). User should connect analog signals from external device or analog output
channel on board to external input signal ATRG0/1. On the PCIE-1805, the threshold
level is set using a dedicated 16-bit DAC. By software, you can program the thresh-
old level by writing a voltage value to this DAC; this value can range from -10 V to
+10 V.
Table B.1: Analog Input Data Format
AI Code Mapping Voltage
Hex. Dec. Unipolar Bipolar
0000 h 0 d 0 - FS/2
7FFF h 32767 d FS/2 - 1 LSB - 1LSB
8000 h 32768 d FS/2 0
FFFF h 65535 d FS - 1 LSB FS/2 - 1 LSB
1 LSB FS/65536 FS/65536
Table B.2: Full Scale Values for Input Voltage Ranges
Gain
Unipolar Bipolar
Range FS Range FS
0.5 N/A N/A ± 10 V 20
1 0 ~ 10 V 10 ± 5 V 10
2 0 ~ 5 V 5 ± 2.5 V 5
4 0 ~ 2.5 V 2.5 ± 1.25 V 2.5
8 0 ~ 1.25 V 1.25 ± 0.625 V 1.25