Advantech PCIE-1805, User Manual

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25 PCIE-1805 User Manual
Appendix A
S
pecifications
A.2 Analog Input
A.2.1 Functions
Channels
32 single-ended/16 differential, or
mixed. Can be enabled/disabled each
channel independently by software
Input coupling DC
Input range
±10 V, ±5 V, ±2 V, ±1 V, 0 ~ 20 mA,
and 4 ~ 20 mA
A/D converter (ADC) resolution 16 bits
A/D converter (ADC) type Successive approximation (SAR)
Maximum sample rate (fs) 1 MS/s shared by all enabled channels
Sample clock source
Programmable internal source
100 MHz/n, where n = 100 ~
16777216
External source 0 ~ 1 MHz
Trigger mode
Start trigger, delay to start trigger, stop
trigger, delay to stop trigger
Maximum working voltage for all analog inputs ±11 V for all ranges
Common-mode rejection ratio (CMRR, at 60 Hz) 85 dB
Input impedance
AI+ to AGND
>1,000 GΩ in parallel with 9 pF
A+ to A- >1,000 GΩ in parallel with 6 pF
Input bias current 1pA
Input FIFO size
4,095 samples shared by all enabled
channels
Data transfers DMA, programmed I/O
Overvoltage protection for all channels ±15 V