Advantech PCI-1736UP, User Manual

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PCI-1736UP User Manual vi
Table 3.1:Jumper Settings ............................................ 23
3.2.2 BoardID Switch Setting ............................................... 24
3.2.3 Wet/Dry Contact Setting. ............................................. 24
3.3 Signal Connections.......................................................... 25
Table 3.2:Description of CN1 Pin Use ........................ 25
Figure 3.2:I/O Connector Pin Assignments for CN1 ... 25
3.3.1 Isolated Digital Inputs .................................................. 26
Figure 3.3:Isolated Digital Input Connection .............. 26
Figure 3.4:Bi-directional Isolated Digital Input Conn. 26
3.3.2 Isolated Digital Outputs ............................................... 27
Figure 3.5:Isolated Digital Output Connection ............ 27
Appendix A Specifications ................................................. 30
A.1 Isolated Digital Inputs ..................................................... 30
A.2 Isolated Digital Outputs
...................................................... 30
A.3 General
................................................................................. 31
Appendix B Block Diagram............................................... 34
Figure B.1:PCI-1736UP Block Diagram ..................... 34
Appendix C Register Structure & Format....................... 36
C.1 Overview ......................................................................... 36
C.2 I/O Port Address Map .................................................... 36
Table C.1:PCI-1736UP Register Format ..................... 37
C.3 Isolated Digital Input Reg. -- BASE+0H/1H (/2H/3H) .. 38
Table C.2:Register for Isolated Digital Input .............. 38
C.4 Isolated Digital Output Reg.- BASE+0H/1H (/2H/3H) .. 38
Table C.3:Register for Isolated Digital Output ............ 38
C.5 Board ID — BASE+4H ................................................. 39
Table C.4:Register for BoardID ................................... 39
C.6 Interrupt Status Register — BASE+8H/CH/10H............ 40
Table C.5:Register for Interrupt Status ........................ 40
C.7 Interrupt Control Register — BASE+8H/CH/10H ......... 41
Table C.6:Register for Interrupt Control ..................... 41