Advantech PCI-1713, User Manual

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2 8 PCI-1713 User's Manual
4.8 Status Register — BASE+6 and
BASE+7
The registers of BASE+6 and BASE+7 provide information for the A/D
configuration and operation.
Table 4-7: Status register
The content of the status register of BASE+6 is the same as that of the
control register.
F/E FIFO Empty flag
This bit indicates whether the FIFO is empty. 1 means that the FIFO is
empty.
F/H FIFO Half-full flag
This bit indicates whether the FIFO is half-full. 1 means that the FIFO
is half-full.
F/F FIFO Full flag
This bit indicates whether the FIFO is full. 1 means that the FIFO is
full.
IRQ Interrupt flag
This bit indicates the interrupt status. 1 means that an interrupt has
occurred.
Read Status Register
Bit # 7 6 5 4 3 2 1 0
BASE+7 IRQ F/F F/H F/E
BASE+6 ONE/FH IRQEN GATE EXT PACER SW