APPENDIX D
PCI-1711/1731 User’s Manual
Advantech Co., Ltd.
www.advantech.com
– 52 –
Since the 82C54 counter uses a 16-bit structure, each section of
read/write data is split into a least significant byte (LSB) and most
significant byte (MSB). To avoid errors it is important that you make
read/write operations in pairs and keep track of the byte order.
The data format for the control register is as below:
BASE+30(Dec) 82C54 control, standard mode
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Value
SC1
SC0
RW1
RW0
M 2
M 1
M 0
BCD
Description:
SC1 & SC0 Select counter
Counter
S C 1
S C 0
0
0
0
1
0
1
2
1
0
Read-back command
1
1
RW1 & RW0 Select read/write operation
Operation
RW1
RW0
Counter latch
0
0
Read/write LSB
0
1
Read/write MSB
1
0
Read/write LSB first,
1
1
then MSB
M2, M1 & M0 Select operating mode
M2
M1
M0
Mode
Description
0
0
0
0
Stop on terminal count
0
0
1
1
Programmable one shot
X
1
0
2
Rate generator
X
1
1
3
Square wave rate generator
1
0
0
4
Software triggered strobe
1
0
1
5
Hardware triggered strobe
BCD Select binary or BCD counting
BCD
Type
0
Binary counting 16-bits
1
Binary coded decimal (BCD) counting
