APPENDIX C
PCI-1711/1731 User’s Manual
Advantech Co., Ltd.
www.advantech.com
– 47 –
Write
D/A Output Channel 0
Bit #
7
6
5
4
3
2
1
0
BASE+11
DA11
DA10
DA9
DA8
BASE+10
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
Write
Clear Interrupt and FIFO
Bit #
7
6
5
4
3
2
1
0
BASE+9
Clear FIFO
BASE+8
Clear Interrupt
C.9 Clear Interrupt and FIFO — BASE+8 and BASE+9
Writing data to either of these two bytes clears the interrupt or the
FIFO.
Table C-8 Register to clear interrupt and FIFO
C.10 D/A Output Channel 0 — BASE+10 and BASE+11
The write-only registers of BASE+10 and BASE+11 accept data for
D/A Channel 0 output.
PCI-1731
The PCI-1731 is not equipped with the D/A functions.
PCI-1711
Table C-9 Register for D/A channel 0 data
DA11 ~ DA0
Digital to analog data
DA0
LSB of the D/A data
DA11
MSB of the D/A data
