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MIO-5393 User Manual

3.1.2.12

CSM Configuration

CSM Support

Enable/Disable CSM Support.

GateA20 Active

UPON REQUEST - GA20 can be disabled using BIOS services. ALWAYS - do not
allow disabling GA20; this option is useful when any RT code is executed above
1MB.

Option ROM Message

BIOS Set display mode for Option ROM.

INT19 Trap Response

BIOS reaction on INT19 trapping by Option ROM: IMMEDIATE - execute the trap
right away; POSTPONED - execute the trap during legacy boot.

Boot Option Filter

This option controls Legacy/UEFI ROMs priority.

Network

Controls the execution of UEFI and Legacy PXE OpROM.

Storage

Controls the execution of UEFI and Legacy Storage OpROM.

Video

Controls the execution of UEFI and Legacy Video OpROM.

Other PCI Devices

Determines OpROM execution policy for devices other than Network, Storage, or
Video.

Summary of Contents for MIO-5393

Page 1: ...User Manual MIO 5393 9th 8th Gen Intel Xeon Core H series Processor 3 5 MI O Compact SBC DDR4 DP HDMI 48 bit LVDS 2 GbE M 2 E Key M 2 B Key MIOe...

Page 2: ...onsibility for its use nor for any infringe ments of the rights of third parties which may result from its use Acknowledgements Intel is a trademark of Intel Corporation AMI is a trademark of American...

Page 3: ...cost of replacement materials service time and freight Please consult your dealer for more details If you think you have a defective product follow these steps 1 Collect all the information about the...

Page 4: ...ent off and on the user is encouraged to try to correct the interference by one or more of the following measures Reorient or relocate the receiving antenna Increase the separation between the equipme...

Page 5: ...MI O extension evaluation board MIOe 3674 AE2 4 port PoE ports MIOe Module MIOe 3680 AE 2 Port CAN Bus MIOe Module with Isolation Protection 1 No USB support on MIOe 230 2 Support with customized BIO...

Page 6: ...MIO 5393 User Manual vi...

Page 7: ...hes 10 Table 2 1 Jumpers Switches 10 2 2 Connectors 10 Table 2 2 Connectors 10 2 3 Locating Connectors Block Diagram 11 Figure 2 1 MIO 5393 Connector Locations Top Side 11 Figure 2 2 MIO 5393 Connecto...

Page 8: ...68 Table A 18 CN13 COM2 68 Table A 19 CN14 GPIO_P0 69 Table A 20 CN15 GPIO_P1 70 Table A 21 CN16 RJ45_2x1_W XFMR LED 70 Table A 22 CN17 Inverter Power Output 71 Table A 23 CN18 48 bit LVDS Panel 71 T...

Page 9: ...Chapter 1 1 General Information This chapter gives background information on the MIO 5393 Sections include Introduction Specifications Block diagram Board layout and dimensions...

Page 10: ...8th Generation Intel Xeon Core H series E 2276ME 6 cores Base Frequency 2 8GHz Max Turbo Frequency 4 5GHz i7 9850HE 6 cores Base Frequency 2 7GHz Max Turbo Frequency 4 4GHz i7 9850HL 6 cores Base Freq...

Page 11: ...display interfaces HDMI and DP on rear I O Dual Channel 24 bit LVDS DisplayPort1 from MIOe Support Extend Clone and Collage mode with multi display device Dual Display Any two combination between LVDS...

Page 12: ...3 USB 2 0 for M 2 2280 or 3042 device 3042 device support with optional bracket High Definition Audio Intel High Definition Audio Interface High Definition Audio Codec with Realtek proprietary loss le...

Page 13: ...ture 0 60 C 32 140 F Operating Humidity 40 C 95 RH Non Condensing Storage Temperature Storage temperature 40 85 C Storage Humidity Relative humidity 95 60 C 1 3 Block Diagram Nano SIM 48 bit LVDS eDP...

Page 14: ...MIO 5393 User Manual 6 1 4 Board Layout Dimensions Figure 1 1 MIO 5393 Mechanical Drawing Top Side Figure 1 2 MIO 5393 Mechanical Drawing Bottom Side...

Page 15: ...7 MIO 5393 User Manual Chapter 1 General Information Figure 1 3 MIO 5393 Mechanical Drawing Coastline Figure 1 4 MIO 5393 Mechanical Drawing with Cooler...

Page 16: ...MIO 5393 User Manual 8 Figure 1 5 MIO 5393 Mechanical Drawing with Heatsink Figure 1 6 MIO 5393 Mechanical Drawing with Heat Spreader...

Page 17: ...r explains the setup procedures of the MIO 5393 hard ware including instructions on setting jumpers and connecting peripherals switches and indica tors Be sure to read all safety pre cautions before y...

Page 18: ...ectors Table 2 1 Jumpers Switches J1 Clean CMOS J2 Auto Power on Setting J3 COM1 Power Setting J4 LCD Power J5 LVDS VCON Setting Table 2 2 Connectors Label Function CN1 Power Input CN3 SO DIMM 9 2mm C...

Page 19: ...1 MIO 5393 Connector Locations Top Side Figure 2 2 MIO 5393 Connector Locations Bottom Side Figure 2 3 MIO 5393 Connector Locations Coastline CN3 CN4 CN17 CN9 CN28 CN29 CN30 CN18 CN31 CN27CN11 CN10 CN...

Page 20: ...you would connect either pins 1 and 2 or 2 and 3 The jumper settings are schematically depicted in this manual as follows A pair of needle nose pliers may be helpful when working with jumpers If you...

Page 21: ...VDS VCON Setting J5 Table 2 5 COM1 Power Setting J3 Setting Function 1 2 5V 3 4 Wake on Ring Default 5 6 12V Table 2 6 LVDS VCON Setting J4 Setting Function 1 3 3 3V Default 3 5 5V 3 4 12V Table 2 7 L...

Page 22: ...MIO 5393 User Manual 14...

Page 23: ...Chapter 3 3 AMI BIOS Setup...

Page 24: ...ettings and control the various sys tem features This chapter describes the basic navigation of the MIO 5393 BIOS setup screens AMI s BIOS ROM has a built in Setup program that allows users to modify...

Page 25: ...e Main setup screen by selecting the Main tab There are two Main Setup options They are described in this section The Main BIOS Setup screen is shown below The Main BIOS setup screen has two main fram...

Page 26: ...elect any of the items in the left frame of the screen such as CPU Configuration to go to the sub menu for that item You can display an Advanced BIOS Setup option by highlighting it using the Arrow ke...

Page 27: ...19 MIO 5393 User Manual Chapter 3 AMI BIOS Setup 3 1 2 1 RC ACPI Settings Low Power S0 Idle Capability Determine if Enable ACPI Low Power S0 Idle Capability...

Page 28: ...lows users to enable or disable the adjacent cache line prefetch feature Intel VMX Virtualization Technology When Enabled a VMM can utilize the additional hardware capability provided by Vanderpool Te...

Page 29: ...Manual Chapter 3 AMI BIOS Setup 3 1 2 3 Power Performance CPU Power Management Control CPU Power Management Control Options GT Power Management Control GT Power Management Control Options CPU Power Ma...

Page 30: ...HDC Turbo Mode Enable Disable processor turbo mode View Configure Turbo Options View and Configure Turbo Options Config TDP Configuration Config TDP Configuraitons Platform PL1 Enable Enable Disable P...

Page 31: ...w Configure Turbo Options Energy Efficient P state Enable Disable Energy Efficient P state feature Package Power Limit MSR Lock Enable Disable locking of Package Power Limit settings Energy Efficient...

Page 32: ...igurations Configurable TDP Boot Mode Configurable TDP Mode as Nominal Up Down Deactivate TDP selection Configurable TDP Lock Configurable TDP Mode Lock sets the Lock bit CTDP BIOS Control Enables CTD...

Page 33: ...25 MIO 5393 User Manual Chapter 3 AMI BIOS Setup Power Limit 3 Settings Power Limit 3 Override Enable Disable Power Limit 3 override...

Page 34: ...MIO 5393 User Manual 26 CPU Lock Configuration CFG Lock Configure MSR 0xE2 15 CFG Lock bit Overclocking Lock Enable Disable Overclocking Lock BIT 20 in FLEX_RATIO 194 MSR...

Page 35: ...ter 3 AMI BIOS Setup GT Power Management Control RC6 Render Standby Check to enable render standby support Maximum GT Frequency Maximum GT frequency limited by user Disable Turbo GT Frequency Enabled...

Page 36: ...nageability features AMT BIOS Features When disabled AMT BIOS Features are no longer supported and user is no longer able to access MEBx setup AMT Configuration Configure Intel Active Management Techn...

Page 37: ...le Hibernation Enables or Disables System ability to Hibernate OS S4 Sleep State This option may be not effective with some OS ACPI Sleep State Select the highest ACPI sleep state the system will ente...

Page 38: ...tch Brightness PWM Polarity for Native or Invert Power Saving Mode Enable Disable power saving mode Serial Port 1 Configuration Set Parameters of Serial Port 1 Serial Port 2 Configuration Set Paramete...

Page 39: ...User Manual Chapter 3 AMI BIOS Setup Serial Port 1 Configuration Serial Port Enable or Disable Serial Port COM Change Settings Select an optimal settings for Super I O device COM Port Mode COM1 Port...

Page 40: ...MIO 5393 User Manual 32 Serial Port 2 Configuration Serial Port Enable or Disable Serial Port COM Change Settings Select an optimal settings for Super IO device COM Port Mode COM2 Port Mode Select...

Page 41: ...33 MIO 5393 User Manual Chapter 3 AMI BIOS Setup Hardware Monitor Watch Dog Timer Configuration Watch Dog Timer Enable or Disable Watch Dog Timer Function...

Page 42: ...MIO 5393 User Manual 34 GPIO Configuration GPIO0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Configure GPIO0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15...

Page 43: ...an Operation for the Security Device Platform Hierarchy Enable or Disable Platform Hierarchy Storage Hierarchy Enable or Disable Storage Hierarchy Endorsement Hierarchy Enable or Disable Endorsement...

Page 44: ...MIO 5393 User Manual 36 3 1 2 8 S5 RTC Wake Settings Wake System from S5 Enable or disable System wake on alarm event Select FixedTime system will wake on the hr min sec specified...

Page 45: ...l Port Console Redirection Console Redirection This item allows users to enable or disable console redirection for Microsoft Windows Emergency Management Services EMS Console Redirection This item all...

Page 46: ...MIO 5393 User Manual 38 3 1 2 10 Intel TXT Information Intel TXT Information Display Intel TXT information...

Page 47: ...off support The XHCI ownership change should be claimed by XHCI driver USB Mass Storage Driver Support Enable Disable USB Mass Storage Driver Support USB Transfer Time Out Time out value for control...

Page 48: ...n ROM INT19 Trap Response BIOS reaction on INT19 trapping by Option ROM IMMEDIATE execute the trap right away POSTPONED execute the trap during legacy boot Boot Option Filter This option controls Lega...

Page 49: ...41 MIO 5393 User Manual Chapter 3 AMI BIOS Setup 3 1 2 13 NVMe Configuration 3 1 2 14 Network Stack Configuration Network Stack Enable Disable UEFI Network Stack...

Page 50: ...setup screen to enter the Chipset BIOS Setup screen You can display a Chipset BIOS Setup option by highlighting it using the Arrow keys All Plug and Play BIOS Setup options are described in this sec t...

Page 51: ...capability Above 4GB MMIO BIOS Assignment Enable Disable above 4GB Memory Mapped IO BIOS assignment X2APIC Opt Out Enable Disable X2APIC Opt Out Bit Memory Configuration Max TOLUD Maximum Value of TOL...

Page 52: ...Aperture Size DVMT Pre Allocated Select DVMT 5 0 Pre Allocated Fixed Graphics Memory size used by the Internal Graphics Device DVMT Total Gfx Mem Select DVMT 5 0 Total Graphic Memory size used by the...

Page 53: ...Control NXP Non EDID Support NXP Non EDID Support Color Depth Data Packing Color depth and data packing format for Non EDID Support Dual LVDS Mode Select LVDS bus to Single bus mode or Dual bus mode L...

Page 54: ...tion Settings SerialIO Configuration SerialIO Configuration Settings PCH LAN Controller Enable or Disable onboard NIC LAN1 PXE ROM Enable or Disable onboard LAN s PXE option ROM Wake on LAN Enable or...

Page 55: ...47 MIO 5393 User Manual Chapter 3 AMI BIOS Setup PCI Express Configuration PCI Express Root Port 7 9 10 11 12 17 PCI Express Port 5 6 7 8 12 13 Settings...

Page 56: ...how SATA controller operate SATA Controller Speed Indicates the maximum speed the SATA controller can support Software Feature Mask Configuration RST Legacy ROM RST UEFI Driver will refer to the SWFM...

Page 57: ...3 AMI BIOS Setup USB Configuration XHCI Disable Compliance Mode Option to disable Compliance Mode USB Port Disable Override Selectively Enable Disable the corresponding USB Port from reporting a Devic...

Page 58: ...MIO 5393 User Manual 50 Security Configuration RTC Lock Enable will lock bytes 38h 3Fh in the lower upper 128 byte bank of RTC RAM BIOS Lock Enable or Disable the PCH BIOS Lock Enable feature...

Page 59: ...5393 User Manual Chapter 3 AMI BIOS Setup HD Audio Configuration HD Audio Control Detection of the HD Audio device Disabled HDA will be unconditionally disabled Enabled HDA will be unconditionally En...

Page 60: ...MIO 5393 User Manual 52 SerialIO Configuration I2C0 Controller Enable Disables SerialIO Controller...

Page 61: ...setup menu All Security Setup options such as password protection and virus protection are described in this section To access the sub menu for the following items select the item and press Enter Cha...

Page 62: ...wait for user input before booting This means the default boot selection is not automatically started by the firmware Bootup NumLock State Select the keyboard NumLock state Quiet Boot Enables or disa...

Page 63: ...m allows you to rest system setup without saving any changes Save Changes This item allows you to save changes done so far to any of the options Discard Changes This item allows you to discard changes...

Page 64: ...MIO 5393 User Manual 56...

Page 65: ...Chapter 4 4 MIOe Installation...

Page 66: ...y of mechanical improvements Here is the quick installation guide for our thermal design and MIOe module installation 4 1 Quick Installation Guide There is a Heatsink Cooler or optional heatspreader i...

Page 67: ...59 MIO 5393 User Manual Chapter 4 MIOe Installation 4 1 2 Heatsink 4 1 3 Heatspreader...

Page 68: ...MIO 5393 User Manual 60...

Page 69: ...Appendix A A Pin Assignments This appendix contains informa tion of a detailed or specialized nature Sections include Jumper and Connector Tables...

Page 70: ...wer Input CN3 SO DIMM 9 2mm CN4 SO DIMM 5 2mm CN5 RTC Battery CN7 CAN BUS CN8 Front Panel CN9 Audio CN10 SM BUS CN11 I2C CN12 COM1 CN13 COM2 CN14 GPIO_P0 CN15 GPIO_P1 CN16 RJ45_2x1_W XFMR LED CN17 Inv...

Page 71: ...Normal 2 3 Clear COMS Table A 4 J2 Auto Power On Settings Part Number 1653002101 02 Footprint HD_2x1P_79_D Description PIN HEADER 2x1P 2 0mm 180D M DIP 21N12050 Setting Function NC Power Button for P...

Page 72: ...IN HEADER 3x1P 2 0mm 180D M DIP 2000 13 WS Setting Function 1 2 3 3V High for VCON on LVDS 2 3 Low for VCON on LVDS Table A 8 CN1 12V Power Input Part Number 1655003865 Footprint WF_2x2P_165_BOX_RA_D_...

Page 73: ...SODIMM H 5 2mm 260P SMD REV AS0A826 H2RB 7 Pin Pin Name Table A 11 CN5 RTC Battery Part Number 1655005427 01 Footprint WF_2P_49_53398 0271 Description WAFER 2P 1 25mm 180D M SMD 53398 0271 Pin Pin Nam...

Page 74: ...WH Sn H4 7mm WO Pin Pin Name 1 GND 2 BUZZER 3 BUZZER 4 RDC_CASEOPEN 5 SATA_EXT_LED 6 PSIN 7 RST 8 HD LED 3 3V 9 NC 10 Power LED 5V Table A 14 CN9 Audio Part Number 1653007480 01 Footprint HD_5X2P_79_B...

Page 75: ...4020 Footprint FPC4V 125M Description WAFER 4P 1 25mm 180D M SMD 85205 04001 Pin Pin Name 1 GND 2 SMB0_DAT 3 SMB0_CLK 4 V5_SMB Table A 16 CN11 I2 C Part Number 1655904020 Footprint FPC4V 125M Descript...

Page 76: ...Pin Pin Name 1 COM_DCD 2 COM_RXD 3 COM_TXD 4 COM_DTR 5 GND 6 COM_DSR 7 COM_RTS 8 COM_CTS 9 COM_RI or 5 12V Table A 18 CN13 COM2 Part Number 1653007728 01 Footprint WF_10P_49_BOX_53398 1071 Descriptio...

Page 77: ...le A 19 CN14 GPIO_P0 Part Number 1653007728 01 Footprint WF_10P_49_BOX_53398 1071 Description Wafer 1x10P 1 25mm PA M VA WH Sn H4 7mm WO CAP Pin Pin Name 1 GND 2 P0_GPIO7 3 P0_GPIO2 4 P0_GPIO6P 5 P0_G...

Page 78: ...ion Wafer 1x10P 1 25mm PA M VA WH Sn H4 7mm WO CAP Pin Pin Name 1 GND 2 P1_GPIO7 3 P1_GPIO2 4 P1_GPIO6 5 P1_GPIO1 6 P1_GPIO5 7 P1_GPIO0 8 P1_GPIO4 9 5V 10 P1_GPIO3 Table A 21 CN16 RJ45_2x1_W XFMR LED...

Page 79: ...le A 23 CN18 48 bit LVDS Panel Part Number 1653006918 01 Footprint SPH20X2 Description Wafer 2x20P 1 25mm M NY9T VA GFL S WH W Post Pin Pin Name 1 12V or 5V or 3 3V 2 12V or 5V or 3 3V 3 GND 4 GND 5 1...

Page 80: ...93 User Manual 72 26 LVDS1_CLK 27 LVDS0_CLK 28 LVDS1_CLK 29 GND 30 GND 31 LVDS1_CLK 32 LVDS1_DAT 33 GND 34 GND 35 LVDS0_D3 36 LVDS1_D3 37 LVDS0_D3 38 LVDS1_D3 39 NC 40 VCON Table A 23 CN18 48 bit LVDS...

Page 81: ...eDP_TX3 5 GND 6 eDP_TX2 7 eDP_TX2 8 GND 9 eDP_TX1 10 eDP_TX1 11 GND 12 eDP_TX0 13 eDP_TX0 14 GND 15 eDP_AUX 16 eDP_AUX 17 GND 18 12V or 5V or 3 3V 19 12V or 5V or 3 3V 20 12V or 5V or 3 3V 21 12V or...

Page 82: ...MIO 5393 User Manual 74...

Page 83: ...3 01 Footprint NGFF_75P_APCI0163 P001A Description NGFF 75P 0 5mm F LCP RA GFL S BK H8 5mm E key Pin Pin Name Pin Pin Name 1 GND 2 3 3VSB 3 USB_D 4 3 3VSB 5 USB_D 7 GND 8 BT_PCMCLK 10 BT_PCMSYNC 12 BT...

Page 84: ...m M key Pin Name 1 NC GND 2 3 3VSB 3 3VSB 3 GND GND 4 3 3VSB 3 3VSB 5 GND PCIe_RX4 6 POWER_OFF NC 7 USB7_P PCIe_RX4 8 WWAN_DISABLE NC 9 USB7_P GND 10 NC NC 11 GND PCIe_TX4 12 Key 3 3VSB 13 Key PCIe_TX...

Page 85: ..._TX1 48 NC NC 49 SATA_TX PCIe_TX1 50 NC PLTRST 51 GND GND 52 CLK _REQ CLK _REQ 53 CLK _PCIE CLK _PCIE 54 PCIE_WAKE PCIE_WAKE 55 CLK _PCIE CLK _PCIE 56 NC NC 57 GND GND 58 NC NC 59 NC Key 60 NC Key 61...

Page 86: ...06 01 Footprint SIM_6P_N080613 SICR10 Description Nano SIM Card 6P 1 27 F LCP RA GFL S BK H1 37 Pin Pin Name Table A 29 CN25 USB3 0_13H Part Number 1654013480 01 Footprint USB_9X2P_USB5 18F5 BNR0 10 D...

Page 87: ...USB_9X2P_USB5 18F5 BNR0 10 Description USB 3 1 2x9P 2 0mm PA66 F RA G30u D BU H15 69 Pin Pin Name Table A 31 CN27 Internal USB Part Number 1653007480 01 Footprint HD_5X2P_79_BOX_H245 Description BOXH...

Page 88: ...S10 01 Pin Pin Name 1 5V 2 GND 3 GND 4 12V Table A 33 CN29 SATA_7V Part Number 1654013615 01 Footprint SATA_7P_WATF 07DBN6SB1U Description SATA 7P 1 27mm LCP F VA G15u S BK H8 41 W Post Pin Pin Name T...

Page 89: ...EED 4 FAN_PWM Table A 36 CN33 MIOe Part Number 1654006235 Footprint BB_40x2P_32_1625x285_2HOLD Description B B Conn 40x2P 0 8mm 180D F SMD QSE 040 01 L D Pin Pin Name 1 GND 2 GND 3 PCIE_RX0 4 PCIE_TX0...

Page 90: ...T 40 NC 41 SLP_S3 42 CLK24M 43 NC 44 LPC_AD0 45 DDP_HPD 46 LPC_AD1 47 GND 48 LPC_AD2 49 DDP_AUX 50 LPC_AD3 51 DDP_AUX 52 NC 53 GND 54 LPC_SERIRQ 55 DDP_D0 56 LPC_FRAME 57 DDP_D0 58 GND 59 GND 60 USB0_...

Page 91: ...83 MIO 5393 User Manual Appendix A Pin Assignments 74 USB2_D 75 DDP_D3 76 GND 77 GND 78 USB_OC 79 12VSB 80 12VSB 83 GND 84 GND 85 GND 86 GND 87 5VSB 88 5VSB 89 5VSB 90 5VSB Table A 36 CN33 MIOe...

Page 92: ...MIO 5393 User Manual 84...

Page 93: ...Appendix B B System Assignments This appendix contains informa tion of a detailed nature Sections include System I O Ports DMA Channel Assignments 1st MB Memory Map Interrupt Assignments...

Page 94: ...et Generator A0h ADh Interrupt Controller B0h B1h Interrupt Controller B4h BDh Power Management 200h 27Fh CANBus Controller 280h 28Fh I2C Controller 290h 29Fh EC Index Port and Data Port 2A0h 2BFh GPI...

Page 95: ...C0000h CFFFFh System board A0000h BFFFFh PCI Bus A0000h BFFFFh Intel HD Graphic 00000h 9FFFFh System board Table B 4 Interrupt Assignments Interrupt Interrupt source NMI Parity error detected IRQ0 Sy...

Page 96: ...tions are subject to change without notice No part of this publication may be reproduced in any form or by any means electronic photocopying recording or otherwise without prior written permis sion of...

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