MIC-3397 User Manual
60
C.1
Features
Power Sequence
Hot-Swap: Hot insertion and removal control
LPC Bus: Provide LPC Bus access
Watchdog
2x SPI Cross-Switch: Dedicated SPI cross-switch for BIOS
Debug Message: Boot time POST message
C.2
FPGA I/O Registers
The Advantech MIC-3397 FPGA communicates with main I/O spaces. The LPC unit
is used to interconnect the Intel LPC signals. The Debug Port Unit is used to decode
POST codes. The Watchdog is used to detect BIOS ready signal or recover BIOS
code from redundant BIOS flash. The Hot-Swap Out-Of-Service LED Control Unit is
used to control the blue LED during Hot-Insert and Hot-Remove. The other signals in
the Miscellaneous Unit are for interfacing with corresponding I/O interface signals.
LPC Address
I/O Type
Description
0x80h
W
Port 80 Display
0x440h
R
FPGA minor revision ID
0x441h
R
Watch Dog Timer Display
0x442h
R
BIOS Switch display
0x443h/0x 444h
RW
Watchdog Register
0x445h
R
FPGA major revision
0x447h
R
Geography Address (GA)
Summary of Contents for MIC-3397
Page 8: ...MIC 3397 User Manual viii...
Page 12: ...MIC 3397 User Manual 12...
Page 13: ...Chapter 1 1 Hardware Configuration This chapter describes how to configure MIC 3397 hardware...
Page 35: ...Chapter 2 2 AMI BIOS Setup This chapter describes how to configure the AMI BIOS...
Page 60: ...MIC 3397 User Manual 48...
Page 61: ...Appendix A A Pin Assignments This appendix describes pin assignments...
Page 68: ...MIC 3397 User Manual 56...
Page 71: ...Appendix C C FPGA This appendix describes FPGA configuration...
Page 73: ...Appendix D D Glossary...