Chapter 3. Operation
12
Quad Nx 56/64 Module User Manual
61200.184L1-1
TX
Active Transmit
RX
Active Receive Data
PLL/Fifo
Read security: 5
Lock
Phase Lock Loop is locked
RXE
Receive data FIFO Empty
RXF
Receive Data FIFO Full
TXE
Transmit Data FIFO Empty
TXF
Transmit Data FIFO Full
Configuration
The CONFIG submenu configures the Quad Nx 56/64 Module.
Name
Write security: 3; Read security: 5
Allows you to enter a descriptive alpha-numeric name for each port.
Clk (+/-) (TX Clock Polarity)
Write security: 3; Read security: 5
Controls the clock used by the Quad Nx 56/64 Module to accept the trans-
mit (TX) data from the DTE. This is usually set to Normal. If the interface
cable is long, causing a phase shift in the data, the clock can be set to In-
verted. This switches the phase of the clock, which should compensate for
a long cable.
Clk Srce (Clock Source)
Write security: 3; Read security: 5
Selects the source for the DTE transmit clock, either Internal or DTE.
Data (Data Format)
Write security: 3; Read security: 5
Used to control the inverting of the DTE data. This inversion can be useful
when operating with a high-level data link control (HDLC) protocol (often
used as a means to ensure 1s density). Select either Normal or Inverted.
