56
Operation
In conjunction with different trigger modes and counter setups, you
can manipulate a single waveform to generate different and more
complex waveforms.
DLY2_Counter in Iterative Waveform Generation
To expand the flexibility of iterative waveform generation, the
DLY2_counter separates consecutive waveform generations.
The DLY2_counter starts counting down immediately following
a single waveform generation. When it reaches zero, the next
iteration of waveform generation will start, as shown. If the
waveform is generated incrementally, the next waveform will be
generated. The DLY2_counter clock source originates with the
internal 80 MHz timebase.
4.6
Programmable Function I/O
The USB-1900 Series supports powerful programmable I/O func-
tion provided by an FPGA chip, configurable as TTL DI/DO, 32-bit
timer/counters, and PWM output. These signals are single-ended
and 5 V TTL-compliant.
4.6.1
TTL DI/DO
Programmable function I/O can be used as static TTL-compliant
8-CH digital input and 4-CH digital output. You can read/write
these I/O lines by software polling, with sample and update rate
fully controlled by software timing.
Table 4-4: Pin Definition of TTL Digital I/O
Pin
Function
Pin
Function
38
GPI7
17
GPO3
37
GPI6
16
GPO2
36
GPI5
15
GPO1
35
GPI4
14
GPO0
34
GPI3
13
DGND
33
GPI2
32
GPI1
31
GPI0
30
DGND
Summary of Contents for USB-1901
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