ADLINK Technology MI-960, User Manual

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POST Codes 65
MI-960
40
Detect different devices (Parallel ports, serial ports, and
coprocessor in CPU, … etc.) successfully installed in the system
and update the BDA, EBDA…etc.
52
Updates CMOS memory size from memory found in memory test.
Allocates memory for Extended BIOS Data Area from base
memory. Programming the memory hole or any kind of
implementation that needs an adjustment in system RAM size if
needed.
60
Initializes NUM-LOCK status and programs the KBD typematic
rate.
75 Initialize Int-13 and prepare for IPL detection.
78 Initializes IPL devices controlled by BIOS and option ROMs.
7C Generate and write contents of ESCD in NVRam.
84 Log errors encountered during POST.
85 Display errors to the user and gets the user response for error.
87
Execute BIOS setup if needed / requested. Check boot password
if installed.
8C Late POST initialization of chipset registers.
8D Build ACPI tables (if ACPI is supported)
8E
Program the peripheral parameters. Enable/Disable NMI as
selected
90
Initialization of system management interrupt by invoking all
handlers. Please note this checkpoint comes right after
checkpoint 20h
A1 Clean-up work needed before booting to OS.
A2
Takes care of runtime image preparation for different BIOS
modules. Fill the free area in F000h segment with 0FFh. Initializes
the Microsoft IRQ Routing Table. Prepares the runtime language
module. Disables the system configuration display if needed.
A4
Initialize runtime language module. Display boot option popup
menu.
A7
Displays the system configuration screen if enabled. Initialize the
CPU’s before boot, which includes the programming of the
MTRR’s.
A9 Wait for user input at config display if needed.
AA Uninstall POST INT1Ch vector and INT09h vector.
Checkpoint Description