ADLINK Technology LitleBoard 800, Reference Manual

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Chapter 3 Hardware
LittleBoard 800 Reference Manual 33
Note: The shaded area denotes power or ground.
Power Interfaces
Power In
The LittleBoard 800 uses five separate voltages on the board, but only one of the voltages is provided
externally (+5 volts) through the external header (J19), which uses a 7-pin vertical header with 0.156"
(3.96mm) spacing. Holes for a right angle mounting header are also available at J19. All the onboard
voltages are derived from the externally su5 volts DC +/- 5%. The onboard voltages include the
CPU core voltages as well as the other voltages used on the board.
Table 3-14 lists the pin signals for the power supply input header, which uses 7 pins, single row, with 0.156"
pitch.
5 CLK_LVDS_IYBP Clock Positive Output Clock
Channel 2
6 CLK_LVDS_IYBM Clock Negative Output
7 LVDS_IYBP3 Data Positive Output 3
8 LVDS_IYBM3 Data Negative Output
9 LVDS_IYBP2 Data Positive Output 2
10 LVDS_IYBM2 Data Negative Output
11 LVDS_IYBP1 Data Positive Output 1
12 LVDS_IYBM1 Data Negative Output
13 LVDS_IYBP0 Data Positive Output 0
14 LVDS_IYBM0 Data Negative Output
15 LVDS_PANELBKLTCTL Control Panel Backlight NA NA
16 LVDS_PANELVDDEN Enable Panel Power NA NA
17 CLK_LVDS_IYAP Clock Positive Output Clock
Channel 1
18 CLK_LVDS_IYAM Clock Negative Output
19 LVDS_IYAP3 Data Positive Output 3
20 LVDS_IYAM3 Data Negative Output
21 LVDS_IYAP2 Data Positive Output 2
22 LVDS_IYAM2 Data Negative Output
23 LVDS_IYAP1 Data Positive Output 1
24 LVDS_IYAM1 Data Negative Output
25 LVDS_IYAP0 Data Positive Output 0
26 LVDS_IYAM0 Data Negative Output
27 DDCPCLK Display Data Channel Clock NA NA
28 DDCPDATA Display Data Channel Data NA NA
29 LVDS_PANELBKLTEN Enable Backlight Inverter NA NA
30 NC Not Connected NA NA
NOTE
Pins 5-14 constitute 2
nd
channel interface of two channels. Pins 15-26 constitute
1
st
channel interface of two channels, or a single channel interface.
Table 3-13. LVDS Interface Pin/Signal Descriptions (J26) (Continued)