XVME-6500
USER
’S MANUAL
Acromag, Inc. Tel: 248-295-0310
- 40 -
http://www.acromag.com
- 40 -
www.acromag.com
3.17 VME Interface
The XVME-6500 connects to the VMEbus through the high-performance FPGA-
based VME Bridge that is fully compliant with all VME64x data transactions
(SBT, BLT, MBLT, 2eVME, and 2eSST) on all common addressing space modes
(A16, A24 and A32). This allows the XVME-6500 to take advantage of the
higher performance VME protocols, but sill co-exist with VME boards utilizing
legacy protocols.
The VME Bridge connects to the QM87 PCH directly via a x4 PCIe Gen 2
connection, allowing maximum throughput to/from the VMEbus. The FPGA-
based VME bridge also features a fully programmable hardware byte swapper
function.
For VMEbus configuration options, see Sections
3.1.3
Five VME Bridge LEDs are provided for visual indication of the bus status for
quick debugging. The LEDs are described below in Table 3.17.a.
Table 3.17.a: VME Bridge Status LEDs
VME Bridge Status LEDs
LED
Marking
Function
Function Description
DS12
VME SLOT1
Provides VME System Controller Status.
ON
–
System Controller Enabled
OFF
–
System Controller Disabled
DS13
VME SLAVE
Activated on VME slave transactions.
DS14
VME MASTER Activated on VME master transactions.
DS15
FPGA OK
Provides VME operational status.
OFF
–
not operational
TOGGLE
–
FPGA VME bridge is operational
DS16
PCIE ERROR
Provides PCIe status.*
OFF
–
LTSSM L0 state (normal working state)
TOGGLE Slow
–
LTSSM Configuration states
TOGGLE Fast
–
LTSSM L1 states
ON
–
any other state
*Refer to PCI Express specification.
For driver information on the FPGA VME Bridge please refer to
ALTHEA 7910
Application Programming Interface
manual.