Acer AL708, User Manual

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f) Panel Power Sequencing ( PPWR, PBIAS) ( Pin 113~114)
20 has two dedicated outputs PPWR and PBIAS ( Pin113 and Pin114) to control LCD power
sequencing once data and control signals are stable.
g) Parallel ROM Interface Port (Pin 8~25, Pin28~35)
The gm2120 has parallel ROM interface port , pin8~25 for address bus, pin28~35 for data bus.
h) Panel interface (Pin 55~66, Pin69~80, Pin83~87, Pin90~96.Pin99~110)
The gm2120 driver interface is highly programmable. It supports dual bus / dual port for SXGA drivers.
4.1.2 LVDS Transmitter DS90C383 (U1,U2)
The DS90C383 transmitter converts 28 bits of TTL data into four LVDS ( Low Voltage Differential
Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams
over a fifth
LVDS link. At a transmit clock frequency of 85 MHz, 24 bits of RGB data and 3 bits of LCD
timing and control data ( FPLINE, FPFRAME, DRDY) are transmitted at rate of 595 Mbps per LVDS
data channel. U1 AS the ODD pixel transmitter , U2 as the EVEN pixel transmitter.
Pin Number Pin Name Pin Usage
40 GPIO0 / PWM0 Backlight control
41 GPIO1 / PWM1 Volume control
42 GPIO2 / PWM2 Key-Left
43 GPIO3 / TIMER Key-Up
44 GPIO4 / UART_DI Debug Purpose
45 GPIO5 / UART_DO Debug Purpose
46 GPIO6 Key-Right
47 GPIO7 Key-Down
39 GPIO8 / IRQINn LED-Orange
48 GPIO9 Key-Sel
49 GPIO10 Key-Menu
50 GPIO11 No use
51 GPIO12 NV- RAM (U4) SDA
52 GPIO13 NV- RAM (U4) SCL
205 GPIO16 / HFSn NV- RAM (U11) SCL
1 GPIO17 No use
208 GPIO18 No use
207 GPIO19 Key-Power, on / off control
206 GPIO20 Mute , audio disable
4 GPIO21 / IRQn LED-Green
204 GPIO22 / HCLK NV- RAM (U11) SDA
L7EA (AL708) 4-2